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Difference between revisions of "amd/duron/dhm0900aqs1b"
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The '''Mobile Duron 900''' based on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2001. This model was part of the second generation of the {{amd|Duron}} family. Designed based on AMD's {{amd|microarchitecture/k7|K7}} on a [[180 nm process]], this MPU operated at 900 MHz with a bus capable of 200 MT/s with a max TDP of 25 W.
 
The '''Mobile Duron 900''' based on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2001. This model was part of the second generation of the {{amd|Duron}} family. Designed based on AMD's {{amd|microarchitecture/k7|K7}} on a [[180 nm process]], this MPU operated at 900 MHz with a bus capable of 200 MT/s with a max TDP of 25 W.
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== Cache ==
 +
{{main|amd/microarchitectures/k7#Memory_Hierarchy|l1=K7 § Cache}}
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{{cache info
 +
|l1i cache=64 KiB
 +
|l1i break=1x64 KiB
 +
|l1i desc=2-way set associative
 +
|l1i extra=
 +
|l1d cache=64 KiB
 +
|l1d break=1x64 KiB
 +
|l1d desc=2-way set associative
 +
|l1d extra=
 +
|l2 cache=64 KiB
 +
|l2 break=1x64 KiB
 +
|l2 desc=16-way set associative
 +
|l2 extra=
 +
|l3 cache=
 +
|l3 break=
 +
|l3 desc=
 +
|l3 extra=
 +
}}
 +
 +
== Graphics ==
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This SoC has no integrated graphics processing unit.
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== Features ==
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{{mpu features
 +
| em64t      =
 +
| nx          =
 +
| txt        =
 +
| tsx        =
 +
| vpro        =
 +
| ht          =
 +
| tbt1        =
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| tbt2        =
 +
| bpt        =
 +
| vt-x        =
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| vt-d        =
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| ept        =
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| mmx        = Yes
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| emmx        = Yes
 +
| 3dnow      = Yes
 +
| e3dnow      = Yes
 +
| sse        = Yes
 +
| sse2        =
 +
| sse3        =
 +
| ssse3      =
 +
| sse4        =
 +
| sse4.1      =
 +
| sse4.2      =
 +
| aes        =
 +
| pclmul      =
 +
| avx        =
 +
| avx2        =
 +
| bmi        =
 +
| bmi1        =
 +
| bmi2        =
 +
| f16c        =
 +
| fma3        =
 +
| mpx        =
 +
| sgx        =
 +
| eist        =
 +
}}
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* [[has feature::Halt State]]
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* [[has feature::Sleep State]]
 +
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== See also ==
 +
* {{amd|Duron}}
 +
* {{intel|Celeron}}

Revision as of 14:57, 23 October 2016

Template:mpu The Mobile Duron 900 based on the Morgan (Camaro) core was a 32-bit x86 microprocessor developed by AMD and introduced in mid-2001. This model was part of the second generation of the Duron family. Designed based on AMD's K7 on a 180 nm process, this MPU operated at 900 MHz with a bus capable of 200 MT/s with a max TDP of 25 W.

Cache

Main article: K7 § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L1D$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L2$ 64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB 16-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

Template:mpu features

  • Halt State
  • Sleep State

See also

Retrieved from "https://en.wikichip.org/w/index.php?title=amd/duron/dhm0900aqs1b&oldid=26109"
Facts about "Duron 900 (Camaro) - AMD"
RDF feed
base frequency900 MHz (0.9 GHz, 900,000 kHz) +
bus rate200 MT/s (0.2 GT/s, 200,000 kT/s) +
bus speed100 MHz (0.1 GHz, 100,000 kHz) +
bus typeFSB +
clock multiplier9 +
core count1 +
core family6 +
core model7 +
core nameMorgan +
core stepping0 +
core voltage1.45 V (14.5 dV, 145 cV, 1,450 mV) +
core voltage tolerance0.1 V +
cpuid670 +
designerAMD +
die area105.68 mm² (0.164 in², 1.057 cm², 105,680,000 µm²) +
familyDuron +
first announcedAugust 20, 2001 +
first launchedAugust 20, 2001 +
full page nameamd/duron/dhm0900aqs1b +
has featureHalt State + and Sleep State +
has locked clock multipliertrue +
instance ofmicroprocessor +
io voltage2.5 V (25 dV, 250 cV, 2,500 mV) +
io voltage tolerance0.25 V +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
ldateAugust 20, 2001 +
manufacturerAMD +
market segmentMobile +
max case temperature368.15 K (95 °C, 203 °F, 662.67 °R) +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
microarchitectureK7 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature233.15 K (-40 °C, -40 °F, 419.67 °R) +
model numberDuron 900 +
nameDuron 900 +
part numberDHM0900AQS1B +
process180 nm (0.18 μm, 1.8e-4 mm) +
seriesDuron Mobile +
smp max ways1 +
tdp25 W (25,000 mW, 0.0335 hp, 0.025 kW) +
technologyCMOS +
thread count1 +
transistor count25,180,000 +
word size32 bit (4 octets, 8 nibbles) +