Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "amd/am186ex/am186es–20vc\w"
(→Cache) |
m (Bot: corrected mem) |
||
| Line 43: | Line 43: | ||
| thread count = | | thread count = | ||
| max cpus = 1 | | max cpus = 1 | ||
| − | | max memory = 1 | + | | max memory = 1 MiB |
| electrical = Yes | | electrical = Yes | ||
Revision as of 04:30, 23 June 2017
| Am186ES–20VC\W | |||||||||||
| Designer | AMD | ||||||||||
| Manufacturer | AMD | ||||||||||
| Model Number | Am186ES–20VC\W | ||||||||||
| Part Number | Am186ES–20VC\W | ||||||||||
| Market | Embedded | ||||||||||
| Introduction | 1995 (launch) | ||||||||||
| General information | |||||||||||
| Family | Am186Ex | ||||||||||
| Series | Am186ES | ||||||||||
| Frequency | 20 MHz 0.02 GHz
20,000 kHz | ||||||||||
| Bus speed | 5 MHz 0.005 GHz
5,000 kHz | ||||||||||
| Bus rate | 5 MT/s 0.005 GT/s
5,000 kT/s | ||||||||||
| Microarchitecture | |||||||||||
| Microarchitecture | 80186 | ||||||||||
| Core name | Am186 | ||||||||||
| Word size | 16 bit 2 octets
4 nibbles | ||||||||||
| Core count | 1 | ||||||||||
| Max CPUs | 1 | ||||||||||
| Electrical | |||||||||||
| Vcore | 5 V 50 dV ± 10%
500 cV 5,000 mV | ||||||||||
| Tcase | 0 °C 273.15 K – 100 °C32 °F 491.67 °R 373.15 K
212 °F 671.67 °R | ||||||||||
| Tstorage | -65 °C 208.15 K – 125 °C-85 °F 374.67 °R 398.15 K
257 °F 716.67 °R | ||||||||||
| Max Memory | 1 MiB 1,024 KiB
1,048,576 B 9.765625e-4 GiB 9.536743e-7 TiB | ||||||||||
| Pins | |||||||||||
| Pins | 100 | ||||||||||
| IRQ lines | 8 | ||||||||||
| I/O ports | 32 | ||||||||||
| Packaging | |||||||||||
| |||||||||||
Am186ES–20VC\W is a microcontroller designed by AMD. This MCU incorporated the Am186 core which operated at 20 MHz. Additionally this chip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. As with the rest of the Am186ES series, this chip included a serial port hardware handshaking and baud rate generator as well as more extensive set of internal and external interrupt line.
Cache
- Main article: 80186 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 0 KiB 0 B 0 MiB |
1x0 KiB |
| L2$ | 0 KiB 0 MiB 0 B 0 GiB |
1x0 KiB |
Graphics
This chip had no integrated graphics processing unit.
Features
- Single clock input
- Interrupt Control Unit
- General Purpose DMA (2 independent channels)
- 3 x 16-bit timers
- Watchdog Timer
- UART
- 32x General Purpose IO
- Synchronous Serial Interface
- 8-bit or 16-bit memory and I/O static bus modes
- Serial port hardware handshaking
- independent serial port baud rate generators
- Watchdog timer can generate NMI or reset
- Pseudo static RAM (PSRAM) controller
- pulse-width demodulation
- 8 x external interrupts
- 8 x internal interrupts
Documents
Datasheets
- Am186ES/ESLV; Publication #20002
Manuals
Facts about "Am186ES–20VC\W - AMD"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Am186ES–20VC\W - AMD#package_1 + |
| base frequency | 20 MHz (0.02 GHz, 20,000 kHz) + |
| bus rate | 5 MT/s (0.005 GT/s, 5,000 kT/s) + |
| bus speed | 5 MHz (0.005 GHz, 5,000 kHz) + |
| core count | 1 + |
| core name | Am186 + |
| core voltage | 5 V (50 dV, 500 cV, 5,000 mV) + |
| core voltage tolerance | 10% + |
| designer | AMD + |
| family | Am186Ex + |
| first launched | 1995 + |
| full page name | amd/am186ex/am186es–20vc\w + |
| instance of | microcontroller + |
| manufacturer | AMD + |
| market segment | Embedded + |
| max case temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
| max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
| microarchitecture | 80186 + |
| min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
| min storage temperature | 208.15 K (-65 °C, -85 °F, 374.67 °R) + |
| model number | Am186ES–20VC\W + |
| name | Am186ES–20VC\W + |
| package | TQFP-100 + |
| part number | Am186ES–20VC\W + |
| pin count | 100 + |
| series | Am186ES + |
| word size | 16 bit (2 octets, 4 nibbles) + |