From WikiChip
Difference between revisions of "phytium/feiteng/ft-1500a-4"
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|l1i cache=128 KB | |l1i cache=128 KB | ||
|l1i break=4x32 KB | |l1i break=4x32 KB | ||
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|l1i extra=(per core) | |l1i extra=(per core) | ||
|l1d cache=128 KB | |l1d cache=128 KB | ||
|l1d break=4x32 KB | |l1d break=4x32 KB | ||
− | |||
|l1d extra=(per core) | |l1d extra=(per core) | ||
|l2 cache=2 MB | |l2 cache=2 MB | ||
|l2 break=4x512 KB | |l2 break=4x512 KB | ||
− | + | |l3 cache=8 MiB | |
− | |||
− | |l3 cache=8 | ||
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}} | }} | ||
Revision as of 00:59, 19 September 2016
Template:mpu FT-1500A/4 is a quad-core 64-bit ARM system on chip developed by Phytium and introduced in mid-2016. Manufactured on a 28 nm process, the chip operates at 1.5 to 2 Hz and dissipates a maximum of 15 W. This chip is designed for workstations and lightweight servers.
Cache
Cache Info [Edit Values] | ||
L1I$ | 128 KB "KB" is not declared as a valid unit of measurement for this property. |
4x32 KB (per core) |
L1D$ | 128 KB "KB" is not declared as a valid unit of measurement for this property. |
4x32 KB (per core) |
L2$ | 2 MB "MB" is not declared as a valid unit of measurement for this property. |
4x512 KB |
L3$ | 8 MiB 8,192 KiB 8,388,608 B 0.00781 GiB |
Graphics
This SoC has no integrated graphics processing unit.
Memory controller
Integrated Memory Controller | |
Type | DDR3-1600 |
Controllers | 2 |
ECC Support | No |
Max bandwidth | 25.6 GB/s |
Expansions
Networking
- 1x Gigabit Ethernet Interface
Networking | |
10Base-T | Yes |
100Base-T | Yes |
1000Base-T | Yes |
Documents
Datasheet