From WikiChip
Difference between revisions of "intel/pentium (2009)/j4205"
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|l3 cache=0 KB | |l3 cache=0 KB | ||
|l3 desc=No L3$ | |l3 desc=No L3$ | ||
+ | }} | ||
+ | |||
+ | == Memory controller == | ||
+ | {{integrated memory controller | ||
+ | | type = LPDDR3-1333 | ||
+ | | type 2 = LPDDR3-1600 | ||
+ | | type 3 = LPDDR3-2400 | ||
+ | | type 4 = DDR3L-1333 | ||
+ | | type 5 = DDR3L-1600 | ||
+ | | type 6 = DDR3L-1867 | ||
+ | | type 7 = LPDDR4-1600 | ||
+ | | type 8 = LPDDR4-2133 | ||
+ | | type 9 = LPDDR4-2400 | ||
+ | | controllers = 1 | ||
+ | | channels = 2 | ||
+ | | ecc support = No | ||
+ | | bandwidth schan = 19,200 MB/s | ||
+ | | bandwidth dchan = 38,400 MB/s | ||
+ | | max memory = 8,192 MB | ||
}} | }} |
Revision as of 23:20, 5 September 2016
Template:mpu Pentium J4205 is a quad-core 64-bit x86 desktop microprocessor introduced by Intel in 2016. The processor is based on Goldmont microarchitecture and is manufactured on a 14 nm process. The chip operates at 1.5 GHz with burst frequency of 2.6 GHz and has a TDP of 10 W. This MPU incorporates Intel's HD Graphics 505 GPU operating at 250 MHz with a burst frequency of 800 MHz.
Cache
- Main article: Goldmont's Cache
Cache Info [Edit Values] | ||
L1I$ | 128 KB "KB" is not declared as a valid unit of measurement for this property. |
4x32 KB 8-way set associative (per core) |
L1D$ | 96 KB "KB" is not declared as a valid unit of measurement for this property. |
4x24 KB 6-way set associative (per core) |
L2$ | 2 MB "MB" is not declared as a valid unit of measurement for this property. |
2x1 MB 16-way set associative (per 2 cores) |
L3$ | 0 KB "KB" is not declared as a valid unit of measurement for this property. |
No L3$ |
Memory controller
Integrated Memory Controller | |
Type | LPDDR3-1333, LPDDR3-1600, LPDDR3-2400, DDR3L-1333, DDR3L-1600, DDR3L-1867, LPDDR4-1600, LPDDR4-2133, LPDDR4-2400 |
Controllers | 1 |
Channels | 2 |
ECC Support | No |
Bandwidth (single) | 19,200 MB/s |
Bandwidth (dual) | 38,400 MB/s |
Max memory | 8,192 MB |
Facts about "Pentium J4205 - Intel"
l1d$ description | 6-way set associative + |
l1i$ description | 8-way set associative + |
l2$ description | 16-way set associative + |
l3$ description | No L3$ + |