Semiconductor & Computer Engineering
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Difference between revisions of "amd/am5x86/amd-x5-150adw"
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{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | {{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | ||
{{cache info | {{cache info | ||
| − | |l1 cache=16 | + | |l1 cache=16 KiB |
| − | |l1 break=1x16 | + | |l1 break=1x16 KiB |
|l1 desc=4-way set associative | |l1 desc=4-way set associative | ||
|l1 extra=(unified, write-back policy) | |l1 extra=(unified, write-back policy) | ||
Revision as of 21:23, 20 September 2016
Template:mpu The AMD-X5-150ADW was a high-performance 486-based microprocessor introduced by AMD in 1996 as part of their Am5x86 family. This processor had a clock multiplier of 3x, operating at 150 MHz with a bus speed of 50 MHz. This MPU had all the features offered by AMD's Enhanced Am486 such as a large 16 KB L1$ and various power management features. AMD marketed this chip as Pentium-75+-comparable performance.
Contents
Cache
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 16 KiB 16,384 B 0.0156 MiB |
1x16 KiB 4-way set associative (unified, write-back policy) |
Graphics
This chip had no integrated graphics processing unit.
Features
- System Management Mode (SMM)
- P75+ P-Rating
See also
Facts about "AMD-X5-150ADW - AMD"
| has feature | System Management Mode + |
| l1$ description | 4-way set associative + |
| processor p-rating | P75+ + |