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Difference between revisions of "amd/k6-2/k6-2-350afk"
(Created page with "{{amd title|K6-2/350AFK}} {{mpu | name = K6-2/350AFK | no image = No | image = | image size = | caption = | des...") |
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| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
− | | market = | + | | market = Mobile |
− | | first announced = 1999 | + | | first announced = March 22, 1999 |
− | | first launched = 1999 | + | | first launched = March 22, 1999 |
| last order = | | last order = | ||
| last shipment = | | last shipment = | ||
| family = K6-2 | | family = K6-2 | ||
− | | series = K6-2 | + | | series = K6-2 Mobile P |
| locked = | | locked = | ||
| frequency = 349.99 MHz | | frequency = 349.99 MHz | ||
Line 59: | Line 59: | ||
| tjunc max = | | tjunc max = | ||
| tcase min = 0 °C | | tcase min = 0 °C | ||
− | | tcase max = | + | | tcase max = 80 °C |
| tstorage min = -65 °C | | tstorage min = -65 °C | ||
| tstorage max = 150 °C | | tstorage max = 150 °C | ||
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| socket 0 2 type = PGA-321 | | socket 0 2 type = PGA-321 | ||
}} | }} | ||
− | '''K6-2/350AFK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[ | + | '''K6-2/350AFK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.25 µm process]], this MPU operated at 350 MHz with a [[FSB]] operating at 100 MHz. |
== Cache == | == Cache == | ||
{{main|amd/microarchitectures/k6-2#Memory_Hierarchy|l1=K6-2 § Cache}} | {{main|amd/microarchitectures/k6-2#Memory_Hierarchy|l1=K6-2 § Cache}} | ||
− | [[L2$]] can be 512 KB to | + | [[L2$]] can be 512 KB to 1 MB, depending on manufacturer and [[motherboard]] model. L2$ is off-chip. |
{{cache info | {{cache info | ||
|l1i cache=32 KB | |l1i cache=32 KB |
Revision as of 23:39, 4 August 2016
Template:mpu K6-2/350AFK was a 32-bit x86 K6-2-based mobile microprocessor designed and manufactured in 1999 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 350 MHz with a FSB operating at 100 MHz.
Contents
Cache
- Main article: K6-2 § Cache
L2$ can be 512 KB to 1 MB, depending on manufacturer and motherboard model. L2$ is off-chip.
Cache Info [Edit Values] | ||
L1I$ | 32 KB "KB" is not declared as a valid unit of measurement for this property. |
1x32 KB 2-way set associative |
L1D$ | 32 KB "KB" is not declared as a valid unit of measurement for this property. |
1x32 KB 2-way set associative |
Graphics
This SoC has no integrated graphics processing unit.
Features
- Auto-power down state
- Stop clock state
Documents
DataSheet
- AMD-K6-2 Processor Data Sheet; Publication #21850 Revision J/0, February 2000
Facts about "K6-2/350AFK - AMD"
l1d$ description | 2-way set associative + |
l1i$ description | 2-way set associative + |