Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "amd/k6/amd-k6/233adz"
(Created page with "{{amd title|AMD-K6/233ADZ}} {{mpu | name = AMD-K6/233ADZ | no image = Yes | image = | image size = | caption =...") |
|||
| Line 73: | Line 73: | ||
}} | }} | ||
'''AMD-K6/233ADZ''' was a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1998]]. This chip, which was based on AMD's new {{amd|microarchitectures/k6|K6 microarchitecture}}, operated at 233 MHz and dissipated a maximum of 9 W. | '''AMD-K6/233ADZ''' was a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1998]]. This chip, which was based on AMD's new {{amd|microarchitectures/k6|K6 microarchitecture}}, operated at 233 MHz and dissipated a maximum of 9 W. | ||
| + | |||
| + | == Cache == | ||
| + | {{main|amd/microarchitectures/k6#Memory_Hierarchy|l1=K6 § Cache}} | ||
| + | [[L2$]] can be 256 KB to 1 MB, depending on manufacturer and [[motherboard]] model. L2$ is off-chip. | ||
| + | {{cache info | ||
| + | |l1i cache=32 KB | ||
| + | |l1i break=1x32 KB | ||
| + | |l1i desc=2-way set associative | ||
| + | |l1i extra= | ||
| + | |l1d cache=32 KB | ||
| + | |l1d break=1x32 KB | ||
| + | |l1d desc=2-way set associative | ||
| + | |l1d extra= | ||
| + | |l2 cache= | ||
| + | |l2 break= | ||
| + | |l2 desc= | ||
| + | |l2 extra= | ||
| + | |l3 cache= | ||
| + | |l3 break= | ||
| + | |l3 desc= | ||
| + | |l3 extra= | ||
| + | }} | ||
| + | |||
| + | == Graphics == | ||
| + | This SoC has no integrated graphics processing unit. | ||
| + | |||
| + | == Features == | ||
| + | {{mpu features | ||
| + | | mmx = true | ||
| + | }} | ||
| + | * Auto-power down state | ||
| + | * Stop clock state | ||
Revision as of 20:50, 28 July 2016
Template:mpu AMD-K6/233ADZ was a 32-bit x86 mobile microprocessor designed by AMD and introduced in early 1998. This chip, which was based on AMD's new K6 microarchitecture, operated at 233 MHz and dissipated a maximum of 9 W.
Cache
- Main article: K6 § Cache
L2$ can be 256 KB to 1 MB, depending on manufacturer and motherboard model. L2$ is off-chip.
| Cache Info [Edit Values] | ||
| L1I$ | 32 KB "KB" is not declared as a valid unit of measurement for this property. |
1x32 KB 2-way set associative |
| L1D$ | 32 KB "KB" is not declared as a valid unit of measurement for this property. |
1x32 KB 2-way set associative |
Graphics
This SoC has no integrated graphics processing unit.
Features
- Auto-power down state
- Stop clock state
Facts about "AMD-K6/233ADZ - AMD"
| l1d$ description | 2-way set associative + |
| l1i$ description | 2-way set associative + |