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Difference between revisions of "vhdl"

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{{title|VHDL}}
 
{{title|VHDL}}
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'''VHDL''' ([[VHSIC|'''V'''HSIC]] '''[[HDL]]'''), pronounce V-H-D-L, is a [[hardware description language]] used in the design, simulation, and verification of digital logic circuits and digital systems. More recently, VHDL has also been used as a general-purpose highly-concurrent [[programming language]].
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'''VHDL''' ([[VHSIC|'''V'''HSIC]] '''[[HDL]]'''; VHSIC Hardware Description Language), pronounce V-H-D-L, is a [[hardware description language]] used in the design, simulation, and verification of digital logic circuits and digital systems. More recently, VHDL has also been used as a general-purpose highly-concurrent [[programming language]]. VHDL is an industry-standard language for modeling, verifying, and synthesizing digital device.
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== Overview ==
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{{empty section}}
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== Versions ==
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* {{\|IEEE Std 1076-1987}} "VHDL-87"
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* {{\|IEEE Std 1076-1993}} "VHDL-93"
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* {{\|IEEE Std 1076-2000}}
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* {{\|IEEE Std 1076-2002}}
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* {{\|IEEE Std 1076-2008}} "VHDL-2008"
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Revision as of 17:19, 25 July 2016

VHDL (VHSIC HDL; VHSIC Hardware Description Language), pronounce V-H-D-L, is a hardware description language used in the design, simulation, and verification of digital logic circuits and digital systems. More recently, VHDL has also been used as a general-purpose highly-concurrent programming language. VHDL is an industry-standard language for modeling, verifying, and synthesizing digital device.

Overview

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Versions


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