Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "2006"
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* January 5: Rapport introduces the {{rapport|KC256}}, a 256-core microprocessor. This is the first member of the {{rapport|Kilocore}} family, a massively parallel chip architecture. | * January 5: Rapport introduces the {{rapport|KC256}}, a 256-core microprocessor. This is the first member of the {{rapport|Kilocore}} family, a massively parallel chip architecture. | ||
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| + | * October 9: Cavium announces a new family of connection processors, the {{cavium|OCTEON Plus}}. The new processors offer twice as fast clock speed, double the cache and more [[hardware accelerators]]. | ||
* November 29: MathStar introduced their 2nd generation [[FPOA]], the {{mathstar|Arrix}} family. | * November 29: MathStar introduced their 2nd generation [[FPOA]], the {{mathstar|Arrix}} family. | ||
Revision as of 02:30, 11 December 2016
In 2006:
- January 5: Rapport introduces the KC256, a 256-core microprocessor. This is the first member of the Kilocore family, a massively parallel chip architecture.
- October 9: Cavium announces a new family of connection processors, the OCTEON Plus. The new processors offer twice as fast clock speed, double the cache and more hardware accelerators.