From WikiChip
Difference between revisions of "intel/xeon e7/e7-4850"
< intel‎ | xeon e7

(Created page with "{{intel title|Xeon E7-4850}} {{mpu | name = Xeon E7-4850 | no image = Yes | image = | image size = | caption =...")
 
Line 89: Line 89:
 
| socket 0 type      = LGA
 
| socket 0 type      = LGA
 
}}
 
}}
−
'''Xeon E7-4850''' is a {{arch|64}} [[x86]] data center microprocessor that supports up to 4 sockets. This first generation {{intel|Xeon E7}} processor, {{intel|Westmere|Westmere}}-based, operates at a base frequency of 2 GHz with {{intel|turbo boost technology|turob}} frequency of 2.4 GHz for 2 active cores. This chip has a TDP of 130 W, supporting up to 4 channels of DDR3 with support of up to 2 TB of memory.
+
'''Xeon E7-4850''' is a {{arch|64}} deca-core [[x86]] data center microprocessor that supports up to 4 sockets. This first generation {{intel|Xeon E7}} processor, {{intel|Westmere|Westmere}}-based, operates at a base frequency of 2 GHz with {{intel|turbo boost technology|turob}} frequency of 2.4 GHz for 2 active cores. This chip has a TDP of 130 W, supporting up to 4 channels of DDR3 with support of up to 2 TB of memory.
 +
 
 +
== Cache ==
 +
{{main|intel/microarchitectures/westmere#Memory_Hierarchy|l1=Westmere § Cache}}
 +
{{cache info
 +
|l1i cache=320 KB
 +
|l1i break=10x32 KB
 +
|l1i desc=4-way set associative
 +
|l1i extra=(per core)
 +
|l1d cache=320 KB
 +
|l1d break=10x32 KB
 +
|l1d desc=8-way set associative
 +
|l1d extra=(per core)
 +
|l2 cache=2.56 MB
 +
|l2 break=10x256 KB
 +
|l2 desc=8-way set associative
 +
|l2 extra=(per core)
 +
|l3 cache=24 MB
 +
|l3 break=
 +
|l3 desc=16-way set associative
 +
|l3 extra=
 +
}}
 +
 
 +
== Graphics ==
 +
This SoC has no integrated graphics processing unit.
 +
 
 +
== Memory controller ==
 +
{{integrated memory controller
 +
| type              = DDR3-800
 +
| type 2            = DDR3-978
 +
| type 3            = DDR3-1066
 +
| controllers        = 1
 +
| channels          = 4
 +
| ecc support        = Yes
 +
| max bandwidth      =
 +
| bandwidth schan    =
 +
| bandwidth dchan    =
 +
| max memory        = 2048 GB
 +
}}
 +
 
 +
== Features ==
 +
{{mpu features
 +
| em64t      = Yes
 +
| nx          = Yes
 +
| txt        = Yes
 +
| tsx        =
 +
| vpro        =
 +
| ht          = Yes
 +
| tbt1        = Yes
 +
| tbt2        =
 +
| bpt        =
 +
| vt-x        = Yes
 +
| vt-d        = yes
 +
| ept        = Yes
 +
| mmx        = Yes
 +
| sse        = Yes
 +
| sse2        = Yes
 +
| sse3        = Yes
 +
| ssse3      = Yes
 +
| sse4.1      = Yes
 +
| sse4.2      = Yes
 +
| aes        = Yes
 +
| pclmul      =
 +
| avx        =
 +
| avx2        =
 +
| bmi        =
 +
| bmi1        =
 +
| bmi2        =
 +
| f16c        =
 +
| fma3        =
 +
| mpx        =
 +
| sgx        =
 +
| eist        = Yes
 +
| secure key  =
 +
| os guard    =
 +
| intel at    =
 +
}}

Revision as of 23:02, 12 June 2016

Template:mpu Xeon E7-4850 is a 64-bit deca-core x86 data center microprocessor that supports up to 4 sockets. This first generation Xeon E7 processor, Westmere-based, operates at a base frequency of 2 GHz with turob frequency of 2.4 GHz for 2 active cores. This chip has a TDP of 130 W, supporting up to 4 channels of DDR3 with support of up to 2 TB of memory.

Cache

Main article: Westmere § Cache
Cache Info [Edit Values]
L1I$ 320 KB
"KB" is not declared as a valid unit of measurement for this property.
 		10x32 KB 4-way set associative (per core)
L1D$ 320 KB
"KB" is not declared as a valid unit of measurement for this property.
 		10x32 KB 8-way set associative (per core)
L2$ 2.56 MB
"MB" is not declared as a valid unit of measurement for this property.
 		10x256 KB 8-way set associative (per core)
L3$ 24 MB
"MB" is not declared as a valid unit of measurement for this property.
 		16-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Memory controller

Integrated Memory Controller
Type DDR3-800, DDR3-978, DDR3-1066
Controllers 1
Channels 4
ECC Support Yes
Max memory 2048 GB

Features

Template:mpu features

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_e7/e7-4850&oldid=22130"
Facts about "Xeon E7-4850 - Intel"
RDF feed
l1d$ description8-way set associative +
l1i$ description4-way set associative +
l2$ description8-way set associative +
l3$ description16-way set associative +