Semiconductor & Computer Engineering
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Difference between revisions of "amd/am186/n80c186-25"
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* Power saving mode | * Power saving mode | ||
* DRAM Refresh Control Unit | * DRAM Refresh Control Unit | ||
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| + | == Documents == | ||
| + | * [[:File:AMD 80C186 (June 1994).pdf|AMD 80C186 (June 1994)]], Publication #17907 Rev B | ||
Revision as of 06:38, 30 May 2016
Template:mpu N80C186-25 is an 80186-based microprocessor manufactured by AMD. This model is a redesigned CMOS version that operated at 25 MHz and introduced a number of enhancements in addition to being lower-power CMOS, including a DRAM Refresh Control Unit and various power saving modes.
Contents
Cache
- Main article: 80186 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 0 KB "KB" is not declared as a valid unit of measurement for this property. |
1x0 KB |
| L2$ | 0 KB "KB" is not declared as a valid unit of measurement for this property. |
1x0 KB |
Graphics
This chip had no integrated graphics processing unit.
Features
- 10 new instructions
- Two DMA channels
- Three programmable interrupt timers
- Local Bus Controller
- Object code-compatible with all 86/88 software
- Power saving mode
- DRAM Refresh Control Unit
Documents
- AMD 80C186 (June 1994), Publication #17907 Rev B