-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Difference between revisions of "amd/am486/am486dx2-80"
Line 24: | Line 24: | ||
| bus type = FSB | | bus type = FSB | ||
| bus speed = 40 MHz | | bus speed = 40 MHz | ||
− | | bus rate = | + | | bus rate = 40 MT/s |
| clock multiplier = 2 | | clock multiplier = 2 | ||
| cpuid = | | cpuid = |
Revision as of 04:38, 17 May 2016
Template:mpu Am486DX2-100 was an 80486-compatible microprocessor introduced by AMD in 1994. This processor had a clock multiplier of 2 having base frequency of 80 MHz with a bus frequency of 40 MHz.
Cache
- Main article: 80486 § Cache
Cache Info [Edit Values] | ||
L1$ | 8 KB "KB" is not declared as a valid unit of measurement for this property. |
1x8 KB 4-way set associative (unified, write-through policy) |
Graphics
This chip had no integrated graphics processing unit.