From WikiChip
Difference between revisions of "amd/am486/am486sx2-50"
Line 76: | Line 76: | ||
| packaging = Yes | | packaging = Yes | ||
− | | package | + | | package 0 = CPGA-168 |
− | | package type | + | | package 0 type = CPGA |
− | | package pitch | + | | package 0 pins = 168 |
− | | package | + | | package 0 pitch = 2.286 mm |
− | | socket | + | | package 0 width = 44.069 mm |
− | | socket 2 | + | | package 0 length = 44.069 mm |
− | | socket 3 | + | | package 0 height = 3.556 mm |
+ | | socket 0 = Socket 1 | ||
+ | | socket 0 type = | ||
+ | | socket 0 2 = Socket 2 | ||
+ | | socket 0 2 type = | ||
+ | | socket 0 3 = Socket 3 | ||
+ | | socket 0 3 type = | ||
}} | }} | ||
'''Am486SX2-50''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in early 1994. This processor has a clock multiplier of 2 with a core frequency of 50 MHz and a bus frequency of 25 MHz. As with the rest of the 486SX series, this MPU does not have a functional [[FPU]] on-die. | '''Am486SX2-50''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in early 1994. This processor has a clock multiplier of 2 with a core frequency of 50 MHz and a bus frequency of 25 MHz. As with the rest of the 486SX series, this MPU does not have a functional [[FPU]] on-die. |
Revision as of 21:42, 16 May 2016
Template:mpu Am486SX2-50 was an 80486-compatible microprocessor introduced by AMD in early 1994. This processor has a clock multiplier of 2 with a core frequency of 50 MHz and a bus frequency of 25 MHz. As with the rest of the 486SX series, this MPU does not have a functional FPU on-die.
Cache
- Main article: 80486 § Cache
Cache Info [Edit Values] | ||
L1$ | 8 KB "KB" is not declared as a valid unit of measurement for this property. |
1x8 KB 4-way set associative (unified, write-through policy) |
Graphics
This chip had no integrated graphics processing unit.