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'''Core i3-6100U''' is a {{arch|64}} [[dual-core]] low-end mobile [[microprocessor]] introduced by [[Intel]] late 2015. This processor, which is based on the {{intel|Skylake}} microarchitecture and manufactured in [[14 nm process]], has a base frequency of 2.3 GHz with a TDP of 15 W with a configurable TDP-down of 7.5 W operating at 800 MHz. This processor incorporates the {{intel|HD Graphics 520}} [[GPU]] clocked at 300 MHz with a max frequency of 1 GHz.
 
'''Core i3-6100U''' is a {{arch|64}} [[dual-core]] low-end mobile [[microprocessor]] introduced by [[Intel]] late 2015. This processor, which is based on the {{intel|Skylake}} microarchitecture and manufactured in [[14 nm process]], has a base frequency of 2.3 GHz with a TDP of 15 W with a configurable TDP-down of 7.5 W operating at 800 MHz. This processor incorporates the {{intel|HD Graphics 520}} [[GPU]] clocked at 300 MHz with a max frequency of 1 GHz.
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== Cache ==
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{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
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{{cache info
 +
|l1i cache=64 KB
 +
|l1i break=2x32 KB
 +
|l1i desc=8-way set associative
 +
|l1i extra=(per core, write-back)
 +
|l1d cache=64 KB
 +
|l1d break=2x32 KB
 +
|l1d desc=8-way set associative
 +
|l1d extra=(per core, write-back)
 +
|l2 cache=512 KB
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|l2 break=2x256 KB
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|l2 desc=4-way set associative
 +
|l2 extra=(per core, write-back)
 +
|l3 cache=3 MB
 +
|l3 desc=shared
 +
}}

Revision as of 04:06, 13 May 2016

Template:mpu Core i3-6100U is a 64-bit dual-core low-end mobile microprocessor introduced by Intel late 2015. This processor, which is based on the Skylake microarchitecture and manufactured in 14 nm process, has a base frequency of 2.3 GHz with a TDP of 15 W with a configurable TDP-down of 7.5 W operating at 800 MHz. This processor incorporates the HD Graphics 520 GPU clocked at 300 MHz with a max frequency of 1 GHz.

Cache

Main article: Skylake § Cache
Cache Info [Edit Values]
L1I$ 64 KB
"KB" is not declared as a valid unit of measurement for this property.
 		2x32 KB 8-way set associative (per core, write-back)
L1D$ 64 KB
"KB" is not declared as a valid unit of measurement for this property.
 		2x32 KB 8-way set associative (per core, write-back)
L2$ 512 KB
"KB" is not declared as a valid unit of measurement for this property.
 		2x256 KB 4-way set associative (per core, write-back)
L3$ 3 MB
"MB" is not declared as a valid unit of measurement for this property.
 		shared
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i3/i3-6100u&oldid=18641"
Facts about "Core i3-6100U - Intel"
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Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core i3-6100U - Intel#package + and Core i3-6100U - Intel#io +
base frequency2,300 MHz (2.3 GHz, 2,300,000 kHz) +
bus rate4,000 MT/s (4 GT/s, 4,000,000 kT/s) +
bus typeOPI +
clock multiplier23 +
core count2 +
core family6 +
core model78 +
core nameSkylake U +
core steppingD1 +
core voltage (max)1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)0.55 V (5.5 dV, 55 cV, 550 mV) +
designerIntel +
device id0x1916 +
die area98.57 mm² (0.153 in², 0.986 cm², 98,570,000 µm²) +
die count2 +
die length10.3 mm (1.03 cm, 0.406 in, 10,300 µm) +
die width9.57 mm (0.957 cm, 0.377 in, 9,570 µm) +
familyCore i3 +
first announcedSeptember 1, 2015 +
first launchedSeptember 27, 2015 +
full page nameintel/core i3/i3-6100u +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supportfalse +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Smart Response Technology +, My WiFi Technology + and Identity Protection Technology +
has intel enhanced speedstep technologytrue +
has intel flex memory access supporttrue +
has intel identity protection technology supporttrue +
has intel my wifi technology supporttrue +
has intel secure key technologytrue +
has intel smart response technology supporttrue +
has intel supervisor mode execution protectiontrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuHD Graphics 520 +
integrated gpu base frequency300 MHz (0.3 GHz, 300,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units24 +
integrated gpu max frequency1,000 MHz (1 GHz, 1,000,000 KHz) +
integrated gpu max memory32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB) +
is multi-chip packagetrue +
isax86-64 +
isa familyx86 +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description4-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ size3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) +
ldateSeptember 27, 2015 +
main imageFile:skylake u (front; standard).png +
manufacturerIntel +
market segmentMobile +
max cpu count1 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB, 0.0313 TiB) +
max memory bandwidth31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels2 +
max pcie lanes12 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureSkylake +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberi3-6100U +
nameCore i3-6100U +
packageFCBGA-1356 +
part numberFJ8066201931104 +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 281.00 (€ 252.90, £ 227.61, ¥ 29,035.73) +
s-specSR2EU +
seriesi3-6000 +
smp max ways1 +
supported memory typeDDR4-2133 +, LPDDR3-1866 + and DDR3L-1600 +
tdp15 W (15,000 mW, 0.0201 hp, 0.015 kW) +
tdp down7.5 W (7,500 mW, 0.0101 hp, 0.0075 kW) +
tdp down frequency800 MHz (0.8 GHz, 800,000 kHz) +
technologyCMOS +
thread count4 +
transistor count1,750,000,000 +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +