Semiconductor & Computer Engineering
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Difference between revisions of "intel/80486/486sx-33"
| Line 29: | Line 29: | ||
| bus rate = 33 MT/s | | bus rate = 33 MT/s | ||
| clock multiplier = 1 | | clock multiplier = 1 | ||
| − | | s-spec = | + | | s-spec = SK798 |
| + | | s-spec 2 = SK903 | ||
| + | | s-spec 3 = SX680 | ||
| + | | s-spec 4 = SX789 | ||
| + | | s-spec 5 = SX797 | ||
| + | | s-spec 6 = SX847 | ||
| + | | s-spec 7 = SX902 | ||
| + | | s-spec 8 = SX931 | ||
| s-spec es = | | s-spec es = | ||
| − | | s-spec qs = | + | | s-spec qs = Q0384 |
| + | | s-spec qs 2 = Q0575 | ||
| cpuid = | | cpuid = | ||
| Line 53: | Line 61: | ||
| electrical = Yes | | electrical = Yes | ||
| − | | power = | + | | power = 2.5 W |
| v core = 5 V | | v core = 5 V | ||
| − | | v core tolerance = | + | | v core tolerance = 5% |
| temp max = 85 °C | | temp max = 85 °C | ||
| temp min = 0 °C | | temp min = 0 °C | ||
Revision as of 16:19, 11 May 2016
Template:mpu i486SX-33 was a fourth-generation x86 microprocessor introduced by Intel in 1991. This chip, which is based on the 80486 microarchitecture, operated at 33 MHz. In contrast to the i486DX chips, the i486SX line had no functional FPU on-die.
Contents
Cache
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 8 KB "KB" is not declared as a valid unit of measurement for this property. |
1x8 KB 4-way set associative (unified, write-through policy) |
Graphics
This chip had no integrated graphics processing unit.
Features
- System Management Mode (SMM)