Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "intel/80486/486dx2-40"
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| bus rate = 20 MT/s | | bus rate = 20 MT/s | ||
| clock multiplier = 2 | | clock multiplier = 2 | ||
| − | | s-spec = | + | | s-spec = SX722 |
| s-spec es = | | s-spec es = | ||
| s-spec qs = | | s-spec qs = | ||
Revision as of 15:26, 11 May 2016
Template:mpu i486DX2-40 was a fourth-generation x86 microprocessor introduced by Intel in 1992. This chip, which is based on the 80486 microarchitecture, had a clock doubler operating at 40 MHz, twice the bus frequency. Like the original i486DX, this chip implemented the 80387 FPU on-die and incorporated System Management Mode (SMM).
Contents
Cache
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 8 KB "KB" is not declared as a valid unit of measurement for this property. |
1x8 KB 4-way set associative (unified, write-through policy ) |
Graphics
This chip had no integrated graphics processing unit.
Features
- System Management Mode (SMM)