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Difference between revisions of "intel/core i3/i3-6167u"
< intel‎ | core i3

m (Cache)
Line 31: Line 31:
 
| microarch          = Skylake  
 
| microarch          = Skylake  
 
| platform          =  
 
| platform          =  
| core name          =  
+
| core name          = Skylake U
 
| core stepping      = K1
 
| core stepping      = K1
 
| process            = 14 nm
 
| process            = 14 nm
Line 41: Line 41:
 
| max memory        = 32 GB
 
| max memory        = 32 GB
  
| electrical         = Yes
+
| electrical         = Yes
| tdp               = 28 W
+
| sdp                =
| temp max           = 100 C
+
| tdp                 = 28 W
| ctdp down          = 23 W
+
| ctdp down          = 23 W
 +
| ctdp down frequency =
 +
| ctdp up            =
 +
| ctdp up frequency  =
 +
| temp max           = 100 °C
 +
| temp min            = 0 °C
  
 
| packaging          = Yes
 
| packaging          = Yes
| package            = FCBGA1356
+
| package            = FCBGA-1356
 
| package type      = FCBGA
 
| package type      = FCBGA
| package pitch      =  
+
| package pitch      = 0.65 mm
| package size      = 42mm X 24mm
+
| package size      = 42 mm x 24 mm
| socket            = BGA1356
+
| socket            = BGA-1356
 
| socket type        = BGA
 
| socket type        = BGA
 
}}
 
}}
The '''Intel Core i3-6167U''' is a [[dual core]] [[64-bit architecture|64-bit]] [[microprocessor]] set to be released by [[Intel]] in 2016. The microprocessor is based on the [[Skylake]] [[microarchitecture]], manufactured using 14nm process and incorporates the {{intel|Iris Graphics 550}}.
+
'''Core i3-6167U''' is a {{arch|64}} [[dual-core]] low-end desktop [[microprocessor]] introduced by [[Intel]] early 2016. This processor, which is based on the {{intel|Skylake}} microarchitecture and manufactured in [[14 nm process]], has a base frequency of 2.7 GHz with a TDP of 28 W and a configurable TDP-down of 23 W. This processor incorporates the {{intel|Iris Graphics 550}} [[GPU]] clocked at 300 MHz with a max frequency of 1 GHz.
  
 
== Cache ==
 
== Cache ==

Revision as of 01:52, 13 May 2016

Template:mpu Core i3-6167U is a 64-bit dual-core low-end desktop microprocessor introduced by Intel early 2016. This processor, which is based on the Skylake microarchitecture and manufactured in 14 nm process, has a base frequency of 2.7 GHz with a TDP of 28 W and a configurable TDP-down of 23 W. This processor incorporates the Iris Graphics 550 GPU clocked at 300 MHz with a max frequency of 1 GHz.

Cache

Main article: Skylake § Cache
Cache Info [Edit Values]
L1I$ 128 KB
"KB" is not declared as a valid unit of measurement for this property.
4x32 KB 8-way set associative (per core, write-back)
L1D$ 128 KB
"KB" is not declared as a valid unit of measurement for this property.
4x32 KB 8-way set associative (per core, write-back)
L2$ 512 KB
"KB" is not declared as a valid unit of measurement for this property.
2x256 KB 8-way set associative (per core, write-back)
L3$ 3 MB
"MB" is not declared as a valid unit of measurement for this property.
shared

Graphics

Integrated Graphic Information
GPU Intel Iris Graphics 550
Displays 3
Frequency 300 MHz
0.3 GHz
300,000 KHz
Max frequency 1000 MHz
1 GHz
1,000,000 KHz
Max memory 1700 MB
"MB" is not declared as a valid unit of measurement for this property.
Output DisplayPort, Embedded DisplayPort, HDMI, VGA, DVI
DirectX 12
OpenGL 4.4
OpenCL 2.0
HDMI 1.4a
DP 1.2
eDP 1.3
Max HDMI Res 4096x2304 @24 Hz
Max DP Res 4096x2304 @60 Hz
Max eDP Res 4096x2304 @60 Hz
Max VGA Res 1920x1200 @60 Hz

Memory controller

Integrated Memory Controller
Type DDR4-1866, DDR4-2133, LPDDR3-1600, LPDDR3-1866
Controllers 1
Channels 2
ECC Support No
Max bandwidth 34,100 MB/s
Max memory 32,768 MB

Expansions

Template:mpu expansions

Features

Template:mpu features

Facts about "Core i3-6167U - Intel"
has featureintegrated gpu +
integrated gpuIntel Iris Graphics 550 +
integrated gpu base frequency300 MHz (0.3 GHz, 300,000 KHz) +
integrated gpu max frequency1,000 MHz (1 GHz, 1,000,000 KHz) +
l1d$ description8-way set associative +
l1i$ description8-way set associative +
l2$ description8-way set associative +
l3$ descriptionshared +