Difference between revisions of "intel/xeon e3/e3-1515m v5"

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Revision as of 14:44, 4 May 2016

Template:mpu The Xeon E3-1515M V5 is 64-bit x86 mobile quad-core microprocessor for introduced by Intel in October 2015. This entry-level Skylake-based workstations processor operates at 2.8 GHz with turbo boost of 3.7 GHz. This chip has a TDP of 45 Watts with a configurable TDP down of 35 W. The MPU supports up to 64 GB of dual-channel DDR3/4 and has the Iris Pro Graphics P580 IGP.

1 Cache
2 Graphics
3 Memory controller
4 Expansions

Cache

Main article: Skylake § Cache

Cache Info [Edit Values]
L1I$	128 KB "KB" is not declared as a valid unit of measurement for this property.	4x32 KB 8-way set associative (per core, write-back)
L1D$	128 KB "KB" is not declared as a valid unit of measurement for this property.	4x32 KB 8-way set associative (per core, write-back)
L2$	1 MB "MB" is not declared as a valid unit of measurement for this property.	4x256 KB 4-way set associative (per core)
L3$	8 MB "MB" is not declared as a valid unit of measurement for this property.	4x2 MB

Graphics

This GPU features a large 128 MB of eDRAM.

Integrated Graphic Information
GPU	Intel Iris Pro Graphics P580
Device ID	0x193D
Execution Units	72
Displays	3
Frequency	350 MHz 0.35 GHz 350,000 KHz
Max frequency	1 GHz 1,000 MHz 1,000,000 KHz
Max memory	64 GB "GB" is not declared as a valid unit of measurement for this property.
Output	DisplayPort, Embedded DisplayPort, HDMI, DVI
DirectX	12.1
OpenGL	4.4
OpenCL	2.0
HDMI	1.4
DP	1.2
eDP	1.3
Max HDMI Res	4096x2160 @24 Hz
Max DP Res	4096x2304 @60 Hz
Max eDP Res	4096x2304 @60 Hz
	Intel Quick Sync Video
	Intel WiDi (Wireless Display)
	Intel Clear Video

Memory controller

Integrated Memory Controller
Type	LPDDR3-1600, LPDDR3-1866, DDR4-1866, DDR4-2133
Controllers	1
Channels	2
ECC Support	Yes
Max bandwidth	34.1 GB/s
Max memory	64 GB

Expansions

Template:mpu expansions

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_e3/e3-1515m_v5&oldid=17926"

Facts about "Xeon E3-1515M v5 - Intel"

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Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Xeon E3-1515M v5 - Intel#package + and Xeon E3-1515M v5 - Intel#io +
base frequency	2,800 MHz (2.8 GHz, 2,800,000 kHz) +
bus links	4 +
bus rate	8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus type	DMI 3.0 +
clock multiplier	28 +
core count	4 +
core family	6 +
core model	94 +
core name	Skylake H +
core stepping	N0 +
core voltage (max)	1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)	0.55 V (5.5 dV, 55 cV, 550 mV) +
designer	Intel +
device id	0x193D +
die count	2 +
family	Xeon E3 +
first announced	January 2, 2016 +
first launched	January 2, 2016 +
full page name	intel/xeon e3/e3-1515m v5 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has ecc memory support	true +
has extended page tables support	true +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Smart Response Technology +, Stable Image Platform Program + and Identity Protection Technology +
has intel enhanced speedstep technology	true +
has intel flex memory access support	true +
has intel identity protection technology support	true +
has intel secure key technology	true +
has intel smart response technology support	true +
has intel stable image platform program support	true +
has intel supervisor mode execution protection	true +
has intel trusted execution technology	true +
has intel turbo boost technology 2 0	true +
has intel vpro technology	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	Iris Pro Graphics P580 +
integrated gpu base frequency	350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu designer	Intel +
integrated gpu execution units	72 +
integrated gpu max frequency	1,000 MHz (1 GHz, 1,000,000 KHz) +
integrated gpu max memory	65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) +
is multi-chip package	true +
isa	x86-64 +
isa family	x86 +
l1$ size	256 KiB (262,144 B, 0.25 MiB) +
l1d$ description	8-way set associative +
l1d$ size	128 KiB (131,072 B, 0.125 MiB) +
l1i$ description	8-way set associative +
l1i$ size	128 KiB (131,072 B, 0.125 MiB) +
l2$ description	4-way set associative +
l2$ size	1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ size	8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
l4$ size	128 MiB (131,072 KiB, 134,217,728 B, 0.125 GiB) +
ldate	January 2, 2016 +
manufacturer	Intel +
market segment	Mobile +
max cpu count	1 +
max junction temperature	373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory	65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth	31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels	2 +
max operating temperature	100 °C +
max pcie lanes	16 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Skylake +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min operating temperature	0 °C +
min storage temperature	248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number	E3-1515M v5 +
name	Xeon E3-1515M v5 +
package	FCBGA-1440 +
part number	JQ8066202193208 +
platform	Greenlow +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 489.00 (€ 440.10, £ 396.09, ¥ 50,528.37) +
s-spec	SR2QT +
series	E3-1500 v5 +
smp max ways	1 +
supported memory type	LPDDR3-1866 +, DDR3L-1600 + and DDR4-2133 +
tdp	45 W (45,000 mW, 0.0603 hp, 0.045 kW) +
tdp down	35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
technology	CMOS +
thread count	8 +
turbo frequency (1 core)	3,700 MHz (3.7 GHz, 3,700,000 kHz) +
turbo frequency (2 cores)	3,600 MHz (3.6 GHz, 3,600,000 kHz) +
turbo frequency (3 cores)	3,500 MHz (3.5 GHz, 3,500,000 kHz) +
turbo frequency (4 cores)	3,300 MHz (3.3 GHz, 3,300,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensions	true +
x86/has software guard extensions	true +

@@ Line 160: / Line 160: @@
 | bandwidth dchan    =
 | max memory         = 64 GB
+}}
+== Expansions ==
+{{mpu expansions
+| pcie revision      = 3.0
+| pcie lanes         = 16
+| pcie config        = 1x16
+| pcie config 1      = 2x8
+| pcie config 2      = 1x8+2x4
+| usb revision       =
+| usb revision 2     =
+| usb revision N     =
+| usb ports          =
+| sata ports         =
+| integrated lan     =
+| uart               =
 }}

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