From WikiChip
Difference between revisions of "intel/core i7ee/i7-5960x"
< intel‎ | core i7ee

Line 44: Line 44:
 
| core stepping 2    = R2
 
| core stepping 2    = R2
 
| process            = 22 nm
 
| process            = 22 nm
| transistors        =  
+
| transistors        = 2,600,000,000
 
| technology          = CMOS
 
| technology          = CMOS
| die size           =  
+
| die area           = 355.52 mm²
 +
| die width          = 15.0 mm
 +
| die length          = 17.1 mm
 
| word size          = 64 bit
 
| word size          = 64 bit
 
| core count          = 8
 
| core count          = 8
Line 157: Line 159:
 
| os guard    =  
 
| os guard    =  
 
}}
 
}}
 +
 +
== Die Shot ==
 +
* 2,600,000,000 transistors
 +
* 355.52 mm<sup>2</sup>
 +
* 15.0 mm x 17.1 mm
 +
 +
:[[File:haswell (octa-core) die shot.png|650px]]
 +
 +
:[[File:haswell (octa-core) die shot (annotated).png|650px]]
  
 
== See also ==
 
== See also ==
 
* {{intel|Core i7EE|Core i7 Extreme Edition}}
 
* {{intel|Core i7EE|Core i7 Extreme Edition}}

Revision as of 17:27, 9 September 2016

Template:mpu The Core i7-5960X Extreme Edition is a 64-bit octa-core top-of-the-line MPU introduced by Intel for the enthusiasts market. The i7-5960X replaces the i7-4960X, as Intel's flagship microprocessor based on Haswell microarchitecture - also becoming the first consumer-class octa-core microprocessor. This chip operates at 3 GHz with turbo frequency of up to 3.5 GHz for a single core. The i7-5960X supports up to 64 GB of memory (DDR4).

Cache

Main article: Haswell's Cache
Cache Info [Edit Values]
L1I$ 256 KB
"KB" is not declared as a valid unit of measurement for this property.
8x32 KB 8-way set associative (per core)
L1D$ 256 KB
"KB" is not declared as a valid unit of measurement for this property.
8x32 KB 8-way set associative (per core)
L2$ 2 MB
"MB" is not declared as a valid unit of measurement for this property.
8x256 KB 8-way set associative (per core)
L3$ 20 MB
"MB" is not declared as a valid unit of measurement for this property.
8x2.5 20-way set associative (shared)

Graphics

This SoC has no integrated graphics processing unit.

Memory controller

Integrated Memory Controller
Type DDR4-1600, DDR4-1866, DDR4-2133
Controllers 1
Channels 4
ECC Support No
Max bandwidth 68 GB/s
Max memory 64 GB

Expansions

Template:mpu expansions

Features

Template:mpu features

Die Shot

  • 2,600,000,000 transistors
  • 355.52 mm2
  • 15.0 mm x 17.1 mm
haswell (octa-core) die shot.png
haswell (octa-core) die shot (annotated).png

See also

l1d$ description8-way set associative +
l1i$ description8-way set associative +
l2$ description8-way set associative +
l3$ description20-way set associative +