From WikiChip
Difference between revisions of "fairchild/f9450"
< fairchild

(typo)
Line 27: Line 27:
 
|-
 
|-
 
| F9452 || [[Block Protection Unit]]
 
| F9452 || [[Block Protection Unit]]
−
|-
 
−
| Example || Example
 
 
|}
 
|}
  

Revision as of 18:35, 30 January 2014

Fairchild F9450
no photo (ic).svg

Developer Fairchild

Introduction date 1985

Model F9450

Clock 0-20MHz

Bus Width 16-bit

GPRs 16
Memory Specs
Max Memory  ?

Packaging
Package 64-pin BeO

The Fairchild F9450 is a high-performance 16-bit bipolar microprocessor developed by Fairchild in 1985. The F9450, which implements the MIL-STD-1750A standard, was designed for both commercial and military applications.

Overview

The Fairchild F9450 was one of the first chips to implement the MIL-STD-1750A specification. The chip features real-time processing abilities, two programmable timers, interrupt and fault handler support. The chip has built-in support for both single and extended (32 and 48-bit) floating point operations without the need for a co-processor extension as specified by the standard.

Support chips

Model Description
F9451 Memory Management Unit
F9451 Block Protection Unit
F9452 Block Protection Unit

References

External links

Retrieved from "https://en.wikichip.org/w/index.php?title=fairchild/f9450&oldid=1543"