Revision as of 23:50, 23 January 2016

Fairchild 4700 Family
Developer	Fairchild Semiconductor
Manufacturer	Fairchild Semiconductor
Type	microprocessors
Production	1975
Architecture	4-bit bit-slice
Word size	4-bit "-bit" is not declared as a valid unit of measurement for this property.
Technology	CMOS
Clock	2.4576 MHz
Package	DIP24, CerDIP24

The 4700 Series (officially 4700 Macrologic Series CMOS Family) was a family of 4-bit CMOS multi-chip bit-slice microprocessor designed by Fairchild Semiconductor. The series was introduced in 1975. Around the same time Fairchild introduced the 9400 series which was a similar family using bipolar technology instead.

Members

Architecture

The individual chips were designed such that they may be chained in cascading manner to support any word size desired (usually multiples of 4). The operations themselves are spread throughout the family, for example 16 register manipulations were provided by the DAR (4707), 8 arithmetic by the ALRS (4705), and 30 shifting/masking/extending operation were provided by the DPS (4704).

There is no actual ISA, it was up to the designer to develop one and assemble the chips accordingly.

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See also

• Fairchild 9400 Family

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