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Difference between revisions of "amd/k6-2+/k6-2+-500acz"
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'''K6-2+/500ACZ''' was a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[2000]]. Based on the {{amd|microarchitectures/k6-iii|K6-III microarchitecture}} manufactured on a [[0.18 µm process]], this model operated at 500 MHz with a TDP of 16.0 W.
 
'''K6-2+/500ACZ''' was a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[2000]]. Based on the {{amd|microarchitectures/k6-iii|K6-III microarchitecture}} manufactured on a [[0.18 µm process]], this model operated at 500 MHz with a TDP of 16.0 W.

Latest revision as of 05:06, 24 March 2023

Edit Values
K6-2+/500ACZ
General Info
DesignerAMD
ManufacturerAMD
Model NumberK6-2+/500ACZ
Part NumberAMD-K6-2+/500ACZ
MarketMobile
IntroductionApril 18, 2000 (launched)
ShopAmazon
General Specs
FamilyK6-2+
SeriesK6-2+ Mobile
Frequency500 MHz
Bus typeFSB
Bus speed100 MHz
Bus rate100 MT/s
Clock multiplier5.0
CPUID5D4
Microarchitecture
MicroarchitectureK6-III
PlatformSuper 7
Core Family5
Core Model13
Core Stepping4, 5, 6, 7
Process0.18 µm
TechnologyCMOS
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power dissipation12.6 W
Vcore2.0 V ± 0.1 V
VI/O3.3675 V ± 7%
TDP16.0 W
Tcase0 °C – 85 °C
Packaging
PackageCPGA-321
Package TypeCeramic Pin Grid Array
Dimension49.5 mm × 49.5 mm
Pitch2.54 mm
Contacts321
SocketSuper Socket 7

K6-2+/500ACZ was a 32-bit x86 mobile microprocessor designed by AMD and introduced in early 2000. Based on the K6-III microarchitecture manufactured on a 0.18 µm process, this model operated at 500 MHz with a TDP of 16.0 W.

Cache[edit]

Main article: K6-III § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$64 KiB
65,536 B
0.0625 MiB
L1I$32 KiB
32,768 B
0.0313 MiB
1x32 KiB2-way set associative 
L1D$32 KiB
32,768 B
0.0313 MiB
1x32 KiB2-way set associativewrite-back
L2$128 KiB
0.125 MiB
131,072 B
1.220703e-4 GiB
  1x128 KiB4-way set associative 

Graphics[edit]

This processor has no integrated graphics processing unit.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
3DNow!3DNow! Extension
E3DNow!Extended 3DNow! Extension
x86-1616-bit x86
x86-3232-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
PowerNow!PowerNow
  • Auto-power down state
  • Stop clock state

References[edit]

  • "Mobile AMD-K6®-2+ Processor Data Sheet", AMD Publ. #23446, Rev. B, June 1, 2000
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/k6-2%2B/k6-2%2B-500acz&oldid=101409"
Facts about "K6-2+/500ACZ - AMD"
RDF feed
base frequency500 MHz (0.5 GHz, 500,000 kHz) +
bus rate100 MT/s (0.1 GT/s, 100,000 kT/s) +
bus speed100 MHz (0.1 GHz, 100,000 kHz) +
bus typeFSB +
clock multiplier5 +
core count1 +
core family5 +
core model13 +
core stepping4 +, 5 +, 6 + and 7 +
core voltage2 V (20 dV, 200 cV, 2,000 mV) +
core voltage tolerance0.1 V +
cpuid5D4 +
designerAMD +
familyK6-2+ +
first launchedApril 18, 2000 +
full page nameamd/k6-2+/k6-2+-500acz +
has featurePowerNow! +
instance ofmicroprocessor +
io voltage3.368 V (33.675 dV, 336.75 cV, 3,367.5 mV) +
io voltage tolerance7% +
l1$ size64 KiB (65,536 B, 0.0625 MiB) +
l1d$ description2-way set associative +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ description2-way set associative +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +
l2$ description4-way set associative +
l2$ size0.125 MiB (128 KiB, 131,072 B, 1.220703e-4 GiB) +
ldateApril 18, 2000 +
manufacturerAMD +
market segmentMobile +
max case temperature358.15 K (85 °C, 185 °F, 644.67 °R) +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
microarchitectureK6-III +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model numberK6-2+/500ACZ +
nameK6-2+/500ACZ +
packageCPGA-321 +
part numberAMD-K6-2+/500ACZ +
platformSuper 7 +
power dissipation12.6 W (12,600 mW, 0.0169 hp, 0.0126 kW) +
process180 nm (0.18 μm, 1.8e-4 mm) +
seriesK6-2+ Mobile +
smp max ways1 +
socketSuper Socket 7 +
tdp16 W (16,000 mW, 0.0215 hp, 0.016 kW) +
technologyCMOS +
thread count1 +
word size32 bit (4 octets, 8 nibbles) +