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'''Vector Engine Type 10A''' is an [[octa-core]] [[vector processor]] designed by [[NEC]] and introduced in late 2017. This chip is fabricated on TSMC [[16 nm process]] based on the {{nec|SX-Aurora|l=arch}} mircoarchitecture. VE Type 10A operates at 1.6 GHz and comes with 48 GiB of six 8-hi stacks of [[HBM2]] memory. | '''Vector Engine Type 10A''' is an [[octa-core]] [[vector processor]] designed by [[NEC]] and introduced in late 2017. This chip is fabricated on TSMC [[16 nm process]] based on the {{nec|SX-Aurora|l=arch}} mircoarchitecture. VE Type 10A operates at 1.6 GHz and comes with 48 GiB of six 8-hi stacks of [[HBM2]] memory. | ||
+ | |||
+ | == Performance == | ||
+ | The Vector Engine Type 10A operates at 1.6 GHz and integrates {{nec|SX-Aurora|eight vector cores|l=arch}}. | ||
+ | |||
+ | * Per core: 307 [[gigaFLOPS]] | ||
+ | * Per chip: [[peak flops (double-precision)::2.46 teraFLOPS]] | ||
+ | |||
+ | == Cache == | ||
+ | {{main|nec/microarchitectures/sx-aurora#Memory_Hierarchy|l1=SX-Aurora § Cache}} | ||
+ | {{cache size | ||
+ | |l1 cache=512 KiB | ||
+ | |l1i cache=256 KiB | ||
+ | |l1i break=8x32 KiB | ||
+ | |l1d cache=256 KiB | ||
+ | |l1d break=8x32 KiB | ||
+ | |l2 cache=2 MiB | ||
+ | |l2 break=8x256 KiB | ||
+ | |l3 cache=16 MiB | ||
+ | |l3 break=8x2 MiB | ||
+ | }} | ||
+ | |||
+ | == Memory controller == | ||
+ | {{memory controller | ||
+ | |type=HBM2-1600 | ||
+ | |ecc=No | ||
+ | |max mem=48 GiB | ||
+ | |controllers=6 | ||
+ | |channels=48 | ||
+ | |width=1024 bit | ||
+ | |max bandwidth=1,229 GB/s | ||
+ | |frequency=800 MHz | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions main | ||
+ | | | ||
+ | {{expansions entry | ||
+ | |type=PCIe | ||
+ | |pcie revision=3.0 | ||
+ | |pcie lanes=16 | ||
+ | |pcie config=1x16 | ||
+ | }} | ||
+ | }} | ||
+ | |||
+ | == Card == | ||
+ | The Vector Engine Type 10A supports water cooling only. | ||
+ | |||
+ | |||
+ | :[[File:nec vector engine type 10 water cooled model.jpg|800px]] |
Latest revision as of 08:50, 1 December 2019
Edit Values | |
VE Type 10A | |
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General Info | |
Designer | NEC |
Manufacturer | TSMC |
Model Number | Type 10A |
Market | Server, Workstation |
Introduction | Oct 26, 2017 (announced) 2018 (launched) |
General Specs | |
Family | Vector Engine |
Series | Type 10 |
Frequency | 1,600 MHz |
Microarchitecture | |
Microarchitecture | SX-Aurora |
Platform | SX-Aurora TSUBASA |
Process | 16 nm |
Transistors | 4,800,000,000 |
Technology | CMOS |
Die | 493.68 mm² 14.96 mm × 33.00 mm |
Word Size | 64 bit |
Cores | 8 |
Threads | 8 |
Max Memory | 48 GiB |
Succession | |
Vector Engine Type 10A is an octa-core vector processor designed by NEC and introduced in late 2017. This chip is fabricated on TSMC 16 nm process based on the SX-Aurora mircoarchitecture. VE Type 10A operates at 1.6 GHz and comes with 48 GiB of six 8-hi stacks of HBM2 memory.
Performance[edit]
The Vector Engine Type 10A operates at 1.6 GHz and integrates eight vector cores.
- Per core: 307 gigaFLOPS
- Per chip: 2.46 teraFLOPS2,460,000,000,000 FLOPS
2,460,000,000 KFLOPS
2,460,000 MFLOPS
2,460 GFLOPS
0.00246 PFLOPS
Cache[edit]
- Main article: SX-Aurora § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
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Integrated Memory Controller
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Expansions[edit]
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Expansion Options |
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Card[edit]
The Vector Engine Type 10A supports water cooling only.
Facts about "Vector Engine Type 10A - NEC"
full page name | nec/vector engine/type 10a + |
instance of | microprocessor + |
ldate | 1900 + |