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Difference between revisions of "google/tpu/edge tpu"
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{{google title|Edge TPU}} | {{google title|Edge TPU}} | ||
| − | {{chip}} | + | {{chip |
| − | '''Edge TPU''' is a [[neural processor]] designed by [[Google]] and introduced in early 2019 for inference acceleration of machine learning at the edge. | + | |name=Edge TPU |
| + | |image=edge tpu (front).png | ||
| + | |back image=edge tpu (back).png | ||
| + | |designer=Google | ||
| + | |model number=TPU Edge | ||
| + | |market=Embedded | ||
| + | |market 2=Edge Computing | ||
| + | |first announced=July 25, 2018 | ||
| + | |first launched=July 25, 2018 | ||
| + | |family=TPU | ||
| + | |technology=CMOS | ||
| + | }} | ||
| + | '''Edge TPU''' is a [[neural processor]] designed by [[Google]] and introduced in early 2019 for inference acceleration of machine learning at the edge. The Edge TPU supports 16-bit and 8-bit integer operations and can interface with external components over USB or PCIe. | ||
| + | |||
| + | == Utilizing devices == | ||
| + | * [[used by::Coral Dev Board]] | ||
| + | * [[used by::Coral USB Accelerator]] | ||
| + | * [[used by::Dev Board Mini]] | ||
| + | * [[used by::Mini PCIe Accelerator]] | ||
| + | * [[used by::M.2 Accelerator A+E key]] | ||
| + | * [[used by::M.2 Accelerator B+M key]] | ||
| + | * [[used by::System-on-Module (SoM)]] | ||
| + | * [[used by::Accelerator Module]] | ||
| + | {{expand list}} | ||
| + | |||
| + | == External links == | ||
| + | * [https://cloud.google.com/edge-tpu/ Google Edge TPU website] | ||
Latest revision as of 09:41, 1 February 2020
| Edit Values | |
| Edge TPU | |
 | |
| General Info | |
| Designer | |
| Model Number | TPU Edge |
| Market | Embedded, Edge Computing |
| Introduction | July 25, 2018 (announced) July 25, 2018 (launched) |
| General Specs | |
| Family | TPU |
| Microarchitecture | |
| Technology | CMOS |
| Packaging | |
 | |
Edge TPU is a neural processor designed by Google and introduced in early 2019 for inference acceleration of machine learning at the edge. The Edge TPU supports 16-bit and 8-bit integer operations and can interface with external components over USB or PCIe.
Utilizing devices[edit]
- Coral Dev Board
- Coral USB Accelerator
- Dev Board Mini
- Mini PCIe Accelerator
- M.2 Accelerator A+E key
- M.2 Accelerator B+M key
- System-on-Module (SoM)
- Accelerator Module
This list is incomplete; you can help by expanding it.
External links[edit]
Facts about "Edge TPU - Google"
| full page name | google/tpu/edge tpu + |
| instance of | microprocessor + |
| ldate | 1900 + |