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{{intel title|DL Boost}} | {{intel title|DL Boost}} | ||
| − | '''DL Boost''' ('''deep learning boost''') is | + | '''DL Boost Technology''' ('''deep learning boost''') is an umbrella marketing term used by [[Intel]] for a collection of technologies designed for the [[acceleration]] of AI workloads, including both inference and training. |
== Overview == | == Overview == | ||
| − | '''DL Boost''' is a term used by [[Intel]] to describe a set of features on their microprocessors designed to accelerate AI workloads. The term was first introduced with {{intel|Cascade Lake|l=arch}}. | + | '''DL Boost''' is a term used by [[Intel]] to describe a set of features on their microprocessors designed to accelerate AI workloads. The term was first introduced with {{intel|Cascade Lake|l=arch}} but has since been extended further with more capabilities in newer microarchitectures. |
| − | + | DL Boost includes the following features: | |
| − | |||
| + | * {{x86|AVX512_VNNI|AVX-512 Vector Neural Network Instructions}} (AVX512_VNNI) - an instruction set extension that introduces reduced-precision (8-bit and 16-bit) multiply-accumulate for the acceleration of inference. VNNI was first introduced with {{intel|Cascade Lake|l=arch}} (server) and {{intel|Ice Lake (Client)|Ice Lake|l=arch}} (Client) | ||
| + | * {{x86|AVX512_BF16|AVX-512 BFloat16 Instructions}} (AVX512_BF16) - an instruction set extension for converting to [[bfloat16]] and then performing multiply-accumulate on such values for the acceleration of both inference and training. BG16 was first introduced with {{intel|Cooper Lake|l=arch}}. | ||
| + | * {{x86|AMX|Advanced Matrix Extension}} (AMX) - an extension that introduces a matrix register file and matrix operations. AMX was first introduced with {{intel|Sapphire Rapids|l=arch}}. | ||
| + | |||
| + | == Implementations == | ||
| + | {| class="wikitable" | ||
| + | |- | ||
| + | ! Microarchitecture !! {{x86|AVX512_VNNI}} !! {{x86|AVX512_BF16}} !! {{x86|AMX}} | ||
| + | |- | ||
| + | ! colspan="4" | Client | ||
| + | |- | ||
| + | | {{intel|Ice Lake (Client)|l=arch}} || {{tchk|yes}} || {{tchk|no}} || {{tchk|no}} | ||
| + | |- | ||
| + | ! colspan="4" | Server | ||
| + | |- | ||
| + | | {{intel|Cascade Lake|l=arch}} || {{tchk|yes}} || {{tchk|no}} || {{tchk|no}} | ||
| + | |- | ||
| + | | {{intel|Cooper Lake|l=arch}} || {{tchk|yes}} || {{tchk|yes}} || {{tchk|no}} | ||
| + | |- | ||
| + | | {{intel|Ice Lake (Server)|l=arch}} || {{tchk|yes}} || {{tchk|no}} || {{tchk|no}} | ||
| + | |- | ||
| + | | {{intel|Sapphire Rapids|l=arch}} || {{tchk|yes}} || {{tchk|yes}} || {{tchk|yes}} | ||
| + | |- | ||
| + | | {{intel|Granite Rapids|l=arch}} || {{tchk|some|TBD}} || {{tchk|some|TBD}} || {{tchk|some|TBD}} | ||
| + | |- | ||
| + | | {{intel|Diamond Rapids|l=arch}} || {{tchk|some|TBD}} || {{tchk|some|TBD}} || {{tchk|some|TBD}} | ||
| + | |} | ||
| + | |||
| + | == See also == | ||
| + | * [[bfloat16]] | ||
| + | * [[Neural processors]] | ||
| + | * [[Acceleration]] | ||
[[category:intel]] | [[category:intel]] | ||
Latest revision as of 20:39, 30 June 2020
DL Boost Technology (deep learning boost) is an umbrella marketing term used by Intel for a collection of technologies designed for the acceleration of AI workloads, including both inference and training.
Overview[edit]
DL Boost is a term used by Intel to describe a set of features on their microprocessors designed to accelerate AI workloads. The term was first introduced with Cascade Lake but has since been extended further with more capabilities in newer microarchitectures.
DL Boost includes the following features:
- AVX-512 Vector Neural Network Instructions (AVX512_VNNI) - an instruction set extension that introduces reduced-precision (8-bit and 16-bit) multiply-accumulate for the acceleration of inference. VNNI was first introduced with Cascade Lake (server) and Ice Lake (Client)
- AVX-512 BFloat16 Instructions (AVX512_BF16) - an instruction set extension for converting to bfloat16 and then performing multiply-accumulate on such values for the acceleration of both inference and training. BG16 was first introduced with Cooper Lake.
- Advanced Matrix Extension (AMX) - an extension that introduces a matrix register file and matrix operations. AMX was first introduced with Sapphire Rapids.
Implementations[edit]
| Microarchitecture | AVX512_VNNI | AVX512_BF16 | AMX |
|---|---|---|---|
| Client | |||
| Ice Lake (Client) | ✔ | ✘ | ✘ |
| Server | |||
| Cascade Lake | ✔ | ✘ | ✘ |
| Cooper Lake | ✔ | ✔ | ✘ |
| Ice Lake (Server) | ✔ | ✘ | ✘ |
| Sapphire Rapids | ✔ | ✔ | ✔ |
| Granite Rapids | TBD | TBD | TBD |
| Diamond Rapids | TBD | TBD | TBD |