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Difference between revisions of "intel/mic architecture"
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− | {{intel title|MIC Architecture}} | + | {{intel title|Many Integrated Core (MIC) Architecture}} |
− | '''MIC Architecture''' ('''Many Integrated Core Architecture''') is a term used by [[Intel]] which refers to a series of [[microarchitectures]] that integrated [[many-core microprocessor|many]] [[physical cores]] onto a single integrated circuit. Intel's MIC Architectures inherited many of the original concepts originated | + | '''MIC Architecture''' ('''Many Integrated Core Architecture''') (pronounced ''Mike'') is a term used by [[Intel]] which refers to a series of [[microarchitectures]] that integrated [[many-core microprocessor|many]] [[physical cores]] onto a single integrated circuit. Intel's MIC Architectures inherited many of the original concepts originated from a number of early research projects such as {{intel|Polaris|l=arch}}, {{intel|Rock Creek|l=arch}}, and the {{intel|Larrabee|Larrabee research project|l=arch}}. |
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* {{intel|Knights Ferry|l=arch}} | * {{intel|Knights Ferry|l=arch}} | ||
* {{intel|Knights Corner|l=arch}} | * {{intel|Knights Corner|l=arch}} |
Latest revision as of 08:03, 20 May 2018
MIC Architecture (Many Integrated Core Architecture) (pronounced Mike) is a term used by Intel which refers to a series of microarchitectures that integrated many physical cores onto a single integrated circuit. Intel's MIC Architectures inherited many of the original concepts originated from a number of early research projects such as Polaris, Rock Creek, and the Larrabee research project.
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