From WikiChip
Difference between revisions of "intel/crystal well"
< intel

m (typo fixed)
 
(13 intermediate revisions by 4 users not shown)
Line 1: Line 1:
−
'''Crystal Well''' is the codename for the L4 cache, a discrete [[eDRAM]] silicon die, which is featured in the [[Iris Pro]]-equipped [[Haswell]] microprocessors. The eDRAM silicon die is separate from the main [[Haswell]] die but is package together with it. Crystal Well based processors started shipping in the third quarter of 2013.
+
{{intel title|Crystal Well}}
 +
'''[[name::Crystal Well]]''' is the [[instance of::codename]] for the L4 cache, a discrete [[eDRAM]] silicon die, which is featured in the high-end [[Iris Pro]]-equipped [[manufacturer::Intel]] [[Haswell]] microprocessors. The eDRAM silicon die is separate from the main [[Haswell]] die but is packaged together with it. Crystal Well based processors started shipping in the third quarter of 2013.
  
−
Crystal Well is a true 128MB [[L4 Cache|L4$]] which could be utilized by the core itself, not just by the [[Iris Pro]]'s [[framebuffer]]. I.E. L3$ values that gets evicted go into the L4$. The L4$ caches bother GPU and CPU memory accesses; memory is partitioned between. If the GPU is disabled, such as when a discrete GPU is installed, the L4$ will be used exclusively by the CPU.
+
== Details ==
 +
Crystal Well is a true 128MB [[L4 Cache|L4$]] which could be utilized by the core itself, not just by the [[Iris Pro]]'s [[framebuffer]]. I.E. L3$ values that gets evicted go into L4$. The L4$ caches serve GPU and CPU memory accesses; memory is partitioned between the two. If the GPU is disabled, such as when a discrete GPU is installed, the L4$ will be used exclusively by the CPU.
  
−
[[Intel]] has not disclose much technical specs regarding how the crystal well die communicates with the main die. Intel has stated that the cache is capable of delivering 100GB/s bandwidth (50GB/s in each direction).
+
[[Intel]] has not disclosed many technical specs regarding how the Crystal Well die communicates with the main die. Intel has stated that the cache is capable of delivering 100GB/s bandwidth (50GB/s in each direction).
 +
 
 +
Note that since {{intel|Skylake|l=arch}}, Intel has changed how the [[eDRAM]] works to act as a side cache instead of an L4 cache (see {{intel|Skylake#eDRAM_architectural_changes|l=arch}} for details).
  
 
== Processors ==
 
== Processors ==
−
{| class="wikitable sortable"
+
<!-- NOTE:
−
|-
+
          This table is generated automatically from the data in the actual articles.
−
! colspan="9" style="background:#D6D6FF;" | Crystal Well Processors
+
          If a microprocessor is missing from the list, an appropriate article for it needs to be
−
|-
+
          created and tagged with [[has feature::Crystal Well]] property.
−
! Family !! Number !! Launch Date !! Cores !! Threads !! Clock !! Lithography !! TDP !! Die Size
+
 
−
|-
+
          Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
−
|[[Intel Core i7|Core i7]] || [[Intel Core i7-4950HQ|4950HQ]]   ||Q3 2013  ||4 ||8 ||2.4 GHz  ||22 nm ||47 W || 37.5mm x 32mm
+
-->
−
|-
+
<table class="wikitable sortable">
−
|[[Intel Core i7|Core i7]] || [[Intel Core i7-4850HQ|4850HQ]]  ||Q3 2013  ||4 ||8 ||2.3 GHz  ||22 nm ||47 W || 37.5mm x 32mm
+
<tr><th colspan="9" style="background:#D6D6FF;">Crystal Well Processors</th></tr>
−
|-
+
<tr><th>Model</th><th>[[microprocessor family|Family]]</th><th>Microarchitecture</th><th>Launched</th><th>Cores</th><th>Threads</th><th>Frequency</th><th>TDP</th><th>Process</th></tr>
−
|[[Intel Core i7|Core i7]] || [[Intel Core i7-4750HQ|4750HQ]]  ||Q3 2013  ||4 ||8 ||2 GHz ||22 nm ||47 W || 37.5mm x 32mm
+
{{#ask:
−
|-
+
    [[Category:microprocessor models by intel]]
−
|[[Intel Core i7|Core i7]] || [[Intel Core i7-4960HQ|4960HQ]]  ||Q4 2013  ||4 ||8 ||2.6 GHz  ||22 nm ||47 W || 37.5mm x 32m
+
    [[has feature::Crystal Well]]
−
|-
+
|?full page name
−
|[[Intel Core i7|Core i7]] || [[Intel Core i7-4770R|4770R]]    ||Q2 2013  ||4 ||8 ||3.2 GHz  ||22 nm ||65 W || 37.5mm x 32mm
+
  |?model number
−
|-
+
|?microprocessor family
−
|[[Intel Core i5|Core i5]] || [[Intel Core i5-4570R|4570R]] || Q2 2013 || 4 || 8 ||2.7 GHz ||22 nm ||65 W || 37.5mm x 32mm
+
  |?microarchitecture
−
|-
+
|?first launched
−
|[[Intel Core i5|Core i5]] || [[Intel Core i5-4670R|4670R]] || Q2 2013 || 4 || 8 ||3 GHz  ||22 nm ||65 W || 37.5mm x 32mm
+
  |?core count
−
|}
+
|?thread count
 +
  |?base frequency
 +
|?tdp
 +
  |?process
 +
|format=template
 +
  |template=proc table 1
 +
|mainlabel=-
 +
  |userparam=10
 +
}}
 +
</table>
 +
 
 +
== See also ==
 +
* {{intel|Iris Pro Graphics 5200}}
  
 
== External links ==
 
== External links ==
Line 31: Line 47:
  
  
−
[[Category:Intel microarchitectures]]
+
[[Category:intel]]
−
[[Category:Microarchitectures]]
 

Latest revision as of 01:53, 15 February 2017

Crystal Well is the codename for the L4 cache, a discrete eDRAM silicon die, which is featured in the high-end Iris Pro-equipped Intel Haswell microprocessors. The eDRAM silicon die is separate from the main Haswell die but is packaged together with it. Crystal Well based processors started shipping in the third quarter of 2013.

Details[edit]

Crystal Well is a true 128MB L4$ which could be utilized by the core itself, not just by the Iris Pro's framebuffer. I.E. L3$ values that gets evicted go into L4$. The L4$ caches serve GPU and CPU memory accesses; memory is partitioned between the two. If the GPU is disabled, such as when a discrete GPU is installed, the L4$ will be used exclusively by the CPU.

Intel has not disclosed many technical specs regarding how the Crystal Well die communicates with the main die. Intel has stated that the cache is capable of delivering 100GB/s bandwidth (50GB/s in each direction).

Note that since Skylake, Intel has changed how the eDRAM works to act as a side cache instead of an L4 cache (see Skylake#eDRAM_architectural_changes for details).

Processors[edit]

Crystal Well Processors
ModelFamilyMicroarchitectureLaunchedCoresThreadsFrequencyTDPProcess
i5-4570RCore i5Haswell4 June 2013442,700 MHz
2.7 GHz
2,700,000 kHz
65 W
65,000 mW
0.0872 hp
0.065 kW
22 nm
0.022 μm
2.2e-5 mm
i5-4670RCore i5Haswell4 June 2013443,000 MHz
3 GHz
3,000,000 kHz
65 W
65,000 mW
0.0872 hp
0.065 kW
22 nm
0.022 μm
2.2e-5 mm
i7-4750HQCore i7Haswell2 June 2013482,000 MHz
2 GHz
2,000,000 kHz
47 W
47,000 mW
0.063 hp
0.047 kW
22 nm
0.022 μm
2.2e-5 mm
i7-4760HQCore i7Haswell14 April 2014482,100 MHz
2.1 GHz
2,100,000 kHz
47 W
47,000 mW
0.063 hp
0.047 kW
22 nm
0.022 μm
2.2e-5 mm
i7-4770HQCore i7Haswell20 July 2014482,200 MHz
2.2 GHz
2,200,000 kHz
47 W
47,000 mW
0.063 hp
0.047 kW
22 nm
0.022 μm
2.2e-5 mm
i7-4770RCore i7Haswell4 June 2013483,200 MHz
3.2 GHz
3,200,000 kHz
47 W
47,000 mW
0.063 hp
0.047 kW
22 nm
0.022 μm
2.2e-5 mm
i7-4850EQCore i7Haswell20 February 2014481,600 MHz
1.6 GHz
1,600,000 kHz
47 W
47,000 mW
0.063 hp
0.047 kW
22 nm
0.022 μm
2.2e-5 mm
i7-4850HQCore i7Haswell4 June 2013482,300 MHz
2.3 GHz
2,300,000 kHz
47 W
47,000 mW
0.063 hp
0.047 kW
22 nm
0.022 μm
2.2e-5 mm
i7-4860EQCore i7Haswell20 February 2014481,800 MHz
1.8 GHz
1,800,000 kHz
47 W
47,000 mW
0.063 hp
0.047 kW
22 nm
0.022 μm
2.2e-5 mm
i7-4860HQCore i7Haswell19 January 2014482,300 MHz
2.3 GHz
2,300,000 kHz
47 W
47,000 mW
0.063 hp
0.047 kW
22 nm
0.022 μm
2.2e-5 mm
i7-4870HQCore i7Haswell20 July 2014482,500 MHz
2.5 GHz
2,500,000 kHz
47 W
47,000 mW
0.063 hp
0.047 kW
22 nm
0.022 μm
2.2e-5 mm
i7-4950HQCore i7Haswell4 June 2013482,400 MHz
2.4 GHz
2,400,000 kHz
47 W
47,000 mW
0.063 hp
0.047 kW
22 nm
0.022 μm
2.2e-5 mm
i7-4960HQCore i7Haswell1 September 2013482,600 MHz
2.6 GHz
2,600,000 kHz
47 W
47,000 mW
0.063 hp
0.047 kW
22 nm
0.022 μm
2.2e-5 mm
i7-4980HQCore i7Haswell1 September 2014482,800 MHz
2.8 GHz
2,800,000 kHz
47 W
47,000 mW
0.063 hp
0.047 kW
22 nm
0.022 μm
2.2e-5 mm
E3-1284L v3Xeon E3Haswell1 October 2014481,800 MHz
1.8 GHz
1,800,000 kHz
47 W
47,000 mW
0.063 hp
0.047 kW
22 nm
0.022 μm
2.2e-5 mm

See also[edit]

External links[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/crystal_well&oldid=38977"
Facts about "Crystal Well - Intel"
RDF feed
instance ofcodename +
manufacturerIntel +
nameCrystal Well +