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Latest revision as of 16:28, 13 December 2017

Edit Values
Xeon E5-2699R v4
General Info
DesignerIntel
ManufacturerIntel
Model NumberE5-2699R v4
Part NumberCM8066003216500
S-SpecSR31X
MarketEmbedded
IntroductionOctober 25, 2016 (announced)
October 25, 2016 (launched)
Release Price$4560
ShopAmazon
General Specs
FamilyXeon E5
SeriesE5-2000
LockedYes
Frequency2,200 MHz
Turbo FrequencyYes
Turbo Frequency3,600 MHz (1 core)
Bus typeQPI
Bus speed4,800 MHz
Bus rate2 × 9.6 GT/s
Clock multiplier22
CPUID406F1
Microarchitecture
MicroarchitectureBroadwell
PlatformGrantley EP 2S
ChipsetC610 Series
Core NameBroadwell EP
Core Family6
Core Model4F
Core SteppingB0
Process14 nm
Transistors7,200,000,000
TechnologyCMOS
Die456.12 mm²
Word Size64 bit
Cores22
Threads44
Max Memory1,536 GiB
Multiprocessing
Max SMP2-Way (Multiprocessor)
Electrical
Vcore1.82 V
VI/O1.2 V ± 3%
TDP145 W
Tcase0 °C – ? °C
Tstorage-25 °C – 125 °C

The Xeon E5-2699R v4 is a 64-bit docosa-core x86 microprocessor introduced by Intel in 2016. This embedded server MPU is designed for low-power 2S environments. Operating at 2.2 GHz with a turbo boost frequency of 3.6 GHz for a single active core, this MPU has a TDP of 145 W and is manufactured on a 14 nm process (based on Broadwell).

Cache[edit]

Main article: Broadwell § Cache
Cache Info [Edit Values]
L1I$ 704 KiB
720,896 B
0.688 MiB
22x32 KiB 8-way set associative (per core, write-back)
L1D$ 704 KiB
720,896 B
0.688 MiB
22x32 KiB 8-way set associative (per core, write-back)
L2$ 5.5 MiB
5,632 KiB
5,767,168 B
0.00537 GiB
22x256 KiB 8-way set associative (per core, write-back)
L3$ 55 MiB
56,320 KiB
57,671,680 B
0.0537 GiB
22x2.5 MiB 20-way set associative (shared, per core, write-back)

Graphics[edit]

This microprocessor has no integrated graphics processing unit.

Memory controller[edit]

Integrated Memory Controller
Type DDR4-2400
Controllers 1
Channels 4
ECC Support Yes
Max bandwidth 71.53 GiB/s
Bandwidth (single) 17.88 GiB/s
Bandwidth (dual) 35.76 GiB/s
Max memory 1,536 GiB
Physical Address Extensions 46 bit

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes40
Configsx4, x16


Features[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_e5/e5-2699r_v4&oldid=71014"
Facts about "Xeon E5-2699R v4 - Intel"
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has advanced vector extensionstrue +
has advanced vector extensions 2true +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel vPro Technology +, Extended Page Tables + and Transactional Synchronization Extensions +
has intel enhanced speedstep technologytrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
l1d$ description8-way set associative +
l1d$ size704 KiB (720,896 B, 0.688 MiB) +
l1i$ description8-way set associative +
l1i$ size704 KiB (720,896 B, 0.688 MiB) +
l2$ description8-way set associative +
l2$ size5.5 MiB (5,632 KiB, 5,767,168 B, 0.00537 GiB) +
l3$ description20-way set associative +
l3$ size55 MiB (56,320 KiB, 57,671,680 B, 0.0537 GiB) +