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Difference between revisions of "amd/duron/dhm1000avs1b"
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{{amd title|Duron 1000 (Camaro)}}
 
{{amd title|Duron 1000 (Camaro)}}
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| name                = Duron 1000
 
| name                = Duron 1000
 
| no image            = Yes
 
| no image            = Yes

Latest revision as of 15:07, 13 December 2017

Edit Values
Duron 1000
General Info
DesignerAMD
ManufacturerAMD
Model NumberDuron 1000
Part NumberDHM1000AVS1B
MarketMobile
IntroductionDecember 17, 2001 (announced)
December 17, 2001 (launched)
ShopAmazon
General Specs
FamilyDuron
SeriesDuron Mobile
LockedYes
Frequency1000 MHz
Bus typeFSB
Bus speed100 MHz
Bus rate200 MT/s
Clock multiplier10
CPUID670
Microarchitecture
MicroarchitectureK7
Core NameMorgan
Core Family6
Core Model7
Core Stepping0
Process180 nm
Transistors25,180,000
TechnologyCMOS
Die105.68 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore1.40 V ± 0.1 V
VI/O2.5 V ± 0.25 V
TDP25 W
Tcase0 °C – 95 °C
Tstorage-40 °C – 100 °C

The Mobile Duron 1000 based on the Morgan (Camaro) core was a 32-bit x86 microprocessor developed by AMD and introduced in late 2001. This model was part of the second generation of the Duron family. Designed based on AMD's K7 on a 180 nm process, this MPU operated at 1000 MHz with a bus capable of 200 MT/s with a max TDP of 25 W.

Cache[edit]

Main article: K7 § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L1D$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L2$ 64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB 16-way set associative

Graphics[edit]

This SoC has no integrated graphics processing unit.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
3DNow!3DNow! Extension
E3DNow!Extended 3DNow! Extension
SSEStreaming SIMD Extensions
  • Halt State
  • Sleep State

Documents[edit]

DataSheet[edit]

See also[edit]

has featureHalt State + and Sleep State +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +