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Difference between revisions of "freescale/qoriq/p1013"
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Latest revision as of 15:13, 13 December 2017

Edit Values
QorIQ P1013
qoriq freescale pbgaii.png
General Info
DesignerFreescale
ManufacturerIBM
Model NumberP1013
MarketNetworking, Embedded
IntroductionSeptember 9, 2009 (announced)
2010 (launched)
General Specs
FamilyQorIQ
SeriesP1
Frequency1,067 MHz
Microarchitecture
ISAPower ISA v2.03 (Power)
Microarchitecturee500
Core Namee500 v2
Process45 nm
TechnologyCMOS
Word Size32 bit
Cores1
Threads1
Electrical
Power dissipation3 W
Packaging
PackageTE-PBGA-II-689 (TE PBGA-II)
Temperature-Enhanced Plastic BGA
Dimension31 mm x 31 mm
Contacts689

QorIQ P1013 is a 32-bit embedded POWER microprocessor introduced by Freescale in late 2009. This networking/embedded processor, which is based on the e500 microarchitecture and is fabricated on a 45 nm SOI process, operates at 1,067 MHz and supports 64-bit DDR3-800 memory.

Cache[edit]

Main article: e500 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$64 KiB
65,536 B
0.0625 MiB
L1I$32 KiB
32,768 B
0.0313 MiB
1x32 KiB8-way set associative 
L1D$32 KiB
32,768 B
0.0313 MiB
1x32 KiB8-way set associative 
L2$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
  1x256 KiB8-way set associativeWrite-through

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-800
Supports ECCYes
Controllers1
Channels1
Width64 bit
Max Bandwidth5.96 GiB/s
6,103.04 MiB/s
6.4 GB/s
6,399.501 MB/s
0.00582 TiB/s
0.0064 TB/s
Bandwidth
Single 5.96 GiB/s

Expansions[edit]

  • 3x 10/100/1000 Ethernet with 2x SGMII
  • x4+1 PCIe 1.0 interface
  • 2x USB 2.0
  • SD/MMC
  • SPI
  • 2x I2C
  • UART

Block Diagram[edit]

qoriq p1013 block diagram.png

Documents[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=freescale/qoriq/p1013&oldid=70340"
Facts about "QorIQ P1013 - Freescale"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
QorIQ P1013 - Freescale#package +
base frequency1,067 MHz (1.067 GHz, 1,067,000 kHz) +
core count1 +
core namee500 v2 +
designerFreescale +
familyQorIQ +
first announcedSeptember 9, 2009 +
first launched2010 +
full page namefreescale/qoriq/p1013 +
has ecc memory supporttrue +
instance ofmicroprocessor +
isaPower ISA v2.03 +
isa familyPower +
l1$ size64 KiB (65,536 B, 0.0625 MiB) +
l1d$ description8-way set associative +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ description8-way set associative +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +
l2$ description8-way set associative +
l2$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
ldate2010 +
main imageFile:qoriq freescale pbgaii.png +
manufacturerIBM +
market segmentNetworking + and Embedded +
max memory bandwidth5.96 GiB/s (6,103.04 MiB/s, 6.4 GB/s, 6,399.501 MB/s, 0.00582 TiB/s, 0.0064 TB/s) +
max memory channels1 +
microarchitecturee500 +
model numberP1013 +
nameQorIQ P1013 +
packageTE-PBGA-II-689 +
power dissipation3 W (3,000 mW, 0.00402 hp, 0.003 kW) +
process45 nm (0.045 μm, 4.5e-5 mm) +
seriesP1 +
supported memory typeDDR3-800 +
technologyCMOS +
thread count1 +
word size32 bit (4 octets, 8 nibbles) +