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Difference between revisions of "freescale/qoriq/p1014"
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|name=QorIQ P1014 | |name=QorIQ P1014 | ||
|image=qoriq p1014.png | |image=qoriq p1014.png |
Latest revision as of 15:13, 13 December 2017
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QorIQ P1014 | |||||||||
General Info | |||||||||
Designer | Freescale | ||||||||
Manufacturer | IBM | ||||||||
Model Number | P1014 | ||||||||
Market | Networking, Embedded | ||||||||
Introduction | 2010 (announced) 2011 (launched) | ||||||||
General Specs | |||||||||
Family | QorIQ | ||||||||
Series | P1 | ||||||||
Frequency | 800 MHz | ||||||||
Microarchitecture | |||||||||
ISA | Power ISA v2.03 (Power) | ||||||||
Microarchitecture | e500 | ||||||||
Core Name | e500 v2 | ||||||||
Process | 45 nm | ||||||||
Technology | CMOS | ||||||||
Word Size | 32 bit | ||||||||
Cores | 1 | ||||||||
Threads | 1 | ||||||||
Electrical | |||||||||
Power dissipation | 1.13 W | ||||||||
Tjunction | 0 °C – 125 °C | ||||||||
Packaging | |||||||||
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QorIQ P1014 is a 32-bit embedded POWER microprocessor introduced by Freescale in 2008. This networking/embedded processor, which is based on the e500 microarchitecture and is fabricated on a 45 nm SOI process, operates at 800 MHz and supports 16-bit DDR3-800 memory.
Cache[edit]
- Main article: e500 § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
- 2x 10/100/1000 Eithernet with SGMII
- 2x PCIe 1.0a controllers with 2 SerDes
Block Diagram[edit]
Facts about "QorIQ P1014 - Freescale"
has ecc memory support | true + |
l1$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) + |
max memory bandwidth | 1.49 GiB/s (1,525.76 MiB/s, 1.6 GB/s, 1,599.875 MB/s, 0.00146 TiB/s, 0.0016 TB/s) + |
max memory channels | 1 + |
supported memory type | DDR3-800 + |