From WikiChip
Difference between revisions of "intel/core i5/i5-2450m"
< intel‎ | core i5

 
(5 intermediate revisions by 3 users not shown)
Line 1: Line 1:
 
{{intel title|Core i5-2450M}}
 
{{intel title|Core i5-2450M}}
−
{{mpu
+
{{chip
 
|name=Core i5-2450M
 
|name=Core i5-2450M
 
|no image=Yes
 
|no image=Yes
Line 13: Line 13:
 
|first announced=January, 2012
 
|first announced=January, 2012
 
|first launched=January, 2012
 
|first launched=January, 2012
−
|release price=$225
+
|release price=$823
 +
|release price (tray)=$800
 
|family=Core i5
 
|family=Core i5
−
|series=i5-2000
+
|series=i5-2450m
 
|locked=Yes
 
|locked=Yes
 
|frequency=2,500 MHz
 
|frequency=2,500 MHz
Line 80: Line 81:
 
|type=DDR3-1333
 
|type=DDR3-1333
 
|type 2=DDR3-1066
 
|type 2=DDR3-1066
 +
|type 3=DDR3L-1600
 
|ecc=No
 
|ecc=No
 
|max mem=16 GiB
 
|max mem=16 GiB
Line 100: Line 102:
 
|pcie config 3=1x8+2x4
 
|pcie config 3=1x8+2x4
 
}}
 
}}
 +
}}
 +
 +
== Wireless ==
 +
{{wireless links
 +
|4g=yes
 +
|wimax=yes
 
}}
 
}}
  
Line 137: Line 145:
  
 
== Features ==
 
== Features ==
−
{{x86 features}}
+
{{x86 features
 +
|real=Yes
 +
|protected=Yes
 +
|smm=Yes
 +
|fpu=Yes
 +
|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=No
 +
|avx=Yes
 +
|avx2=No
 +
|avx512f=No
 +
|avx512cd=No
 +
|avx512er=No
 +
|avx512pf=No
 +
|avx512bw=No
 +
|avx512dq=No
 +
|avx512vl=No
 +
|avx512ifma=No
 +
|avx512vbmi=No
 +
|avx5124fmaps=No
 +
|avx5124vnniw=No
 +
|avx512vpopcntdq=No
 +
|abm=No
 +
|tbm=No
 +
|bmi1=No
 +
|bmi2=No
 +
|fma3=No
 +
|fma4=No
 +
|aes=Yes
 +
|rdrand=No
 +
|sha=No
 +
|xop=No
 +
|adx=No
 +
|clmul=Yes
 +
|f16c=No
 +
|tbt1=No
 +
|tbt2=No
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|sst=No
 +
|flex=Yes
 +
|fastmem=Yes
 +
|ivmd=No
 +
|intelnodecontroller=No
 +
|intelnode=No
 +
|kpt=No
 +
|ptt=No
 +
|intelrunsure=No
 +
|mbe=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=Yes
 +
|sipp=No
 +
|att=Yes
 +
|ipt=Yes
 +
|tsx=No
 +
|txt=No
 +
|ht=Yes
 +
|vpro=No
 +
|vtx=Yes
 +
|vtd=No
 +
|ept=Yes
 +
|mpx=No
 +
|sgx=No
 +
|securekey=No
 +
|osguard=No
 +
|intqat=No
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=No
 +
|amdv=No
 +
|amdsme=No
 +
|amdtsme=No
 +
|amdsev=No
 +
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 +
}}

Latest revision as of 03:05, 5 February 2021

Edit Values
Core i5-2450M
General Info
DesignerIntel
ManufacturerIntel
Model Numberi5-2450M
Part NumberAV8062700995806,
FF8062700995606
S-SpecSR06Z, SR0CH
MarketMobile
IntroductionJanuary, 2012 (announced)
January, 2012 (launched)
Release Price$823
$800 (tray)
ShopAmazon
General Specs
FamilyCore i5
Seriesi5-2450m
LockedYes
Frequency2,500 MHz
Turbo Frequency3,100 MHz (1 core)
Bus typeDMI 2.0
Bus rate4 × 5 GT/s
Clock multiplier25
CPUID0x206A7
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSandy Bridge
PlatformSandy Bridge M
ChipsetCougar Point
Core NameSandy Bridge M
Core Family6
Core Model42
Core SteppingJ1
Process32 nm
Transistors624,000,000
TechnologyCMOS
Die149 mm²
Word Size64 bit
Cores2
Threads4
Max Memory16 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power (idle)3.1 W
Vcore0.3 V-1.52 V
TDP35 W
Tjunction0 °C – 100 °C
Tstorage-25 °C – 125 °C
Packaging
PackageFCBGA-1023 (BGA)
Dimension31 mm x 24 mm
Pitch0.65 mm
Contacts1023
PackagerPGA988B (PGA)
Dimension37.5 mm x 37.5 mm
Pitch1 mm
Contacts988
SocketSocket G2

Core i5-2450M is a dual-core mid-range performance mobile x86 microprocessor introduced by Intel in early 2012. This chip, which is fabricated on a 32 nm process based on the Sandy Bridge microarchitecture, operates at 2.5 GHz with a TDP of 35 Watts and a Turbo Boost frequency of up to 3.1 GHz. The i5-2450M incorporates HD Graphics 3000 integrated graphics operating at 650 MHz with a burst frequency of 1.3 GHz and supports up to 16 GiB of dual-channel DDR3-1333 memory.

Cache[edit]

Main article: Sandy Bridge § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB8-way set associativewrite-back
L3$3 MiB
3,072 KiB
3,145,728 B
0.00293 GiB
  2x1.5 MiB12-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1333, DDR3-1066, DDR3L-1600
Supports ECCNo
Max Mem16 GiB
Controllers1
Channels2
Max Bandwidth19.87 GiB/s
20,346.88 MiB/s
21.335 GB/s
21,335.25 MB/s
0.0194 TiB/s
0.0213 TB/s
Bandwidth
Single 9.93 GiB/s
Double 19.87 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 2.0
Max Lanes: 16
Configuration: 1x16, 2x8, 1x8+2x4


Wireless[edit]

Antu network-wireless-connected-100.svgWireless Communications
Cellular
4G
WiMAX Yes

Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUHD Graphics 3000
DesignerIntelDevice ID0x116
Execution Units12Max Displays2
Frequency650 MHz
0.65 GHz
650,000 KHz
Burst Frequency1,300 MHz
1.3 GHz
1,300,000 KHz
OutputDP, eDP, HDMI, SDVO, CRT
Standards
DirectX10.1
OpenGL3.1
DP1.1
eDP1.1
HDMI1.4
Additional Features
Intel Quick Sync Video
Intel InTru 3D
Intel Flexible Display Interface (FDI)
Intel Clear Video HD

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AESAES Encryption Instructions
CLMULCarry-less Multiplication Extension
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
EISTEnhanced SpeedStep Technology
VT-xVT-x (Virtualization)
EPTExtended Page Tables (SLAT)
Flex MemoryFlex Memory Access
FMAFast Memory Access (w\ GMCH)
MWTMy WiFi Technology
ATTAnti-Theft Technology
IPTIdentity Protection Technology
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i5/i5-2450m&oldid=98496"
Facts about "Core i5-2450M - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core i5-2450M - Intel#pcie +
device id0x116 +
has ecc memory supportfalse +
integrated gpuHD Graphics 3000 +
integrated gpu base frequency650 MHz (0.65 GHz, 650,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units12 +
integrated gpu max frequency1,300 MHz (1.3 GHz, 1,300,000 KHz) +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description12-way set associative +
l3$ size3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) +
max memory bandwidth19.87 GiB/s (20,346.88 MiB/s, 21.335 GB/s, 21,335.25 MB/s, 0.0194 TiB/s, 0.0213 TB/s) +
max memory channels2 +
supported memory typeDDR3-1333 + and DDR3-1066 +