From WikiChip
Difference between revisions of "intel/core i3/i3-2312m"
< intel‎ | core i3

(→‎Memory controller)
m (Bot: moving all {{mpu}} to {{chip}})
 
(8 intermediate revisions by one other user not shown)
Line 1: Line 1:
 
{{intel title|Core i3-2312M}}
 
{{intel title|Core i3-2312M}}
−
{{mpu
+
{{chip
 
|name=Core i3-2312M
 
|name=Core i3-2312M
 
|no image=Yes
 
|no image=Yes
Line 9: Line 9:
 
|s-spec=SR09S
 
|s-spec=SR09S
 
|market=Mobile
 
|market=Mobile
 +
|first announced=June, 2011
 +
|first launched=June, 2011
 +
|release price=$225
 
|family=Core i3
 
|family=Core i3
 
|series=i3-2000
 
|series=i3-2000
Line 46: Line 49:
 
|package module 1={{packages/intel/pga-988b}}
 
|package module 1={{packages/intel/pga-988b}}
 
}}
 
}}
 +
'''Core i3-2312M''' is a [[dual-core]] entry-level performance mobile [[x86]] microprocessor introduced by [[Intel]] in mid-[[2011]]. Fabricated on a [[32 nm process]] based on the {{intel|Sandy Bridge|l=arch}} microarchitecture, this processor operates at 2.1 GHz with a [[TDP]] of 35 Watts. The i3-2312M supports up to 16 GiB of dual-channel DDR3-1333 memory and incorporates Intel's {{intel|HD Graphics 3000}} [[integrated graphics]] operating at 650 MHz with a burst frequency of 1.1 GHz.
 +
 +
This specific model is one of a handful of processors that could be upgraded into a more performant model through Intel's {{intel|Upgrade Service}}. Doing so would turn this "Core i3-2312M" into a "{{\\|i3-2393M|Core i3-2393M}}", increasing the [[cache]] and [[frequency]] for a modest performance gain.
  
 
== Cache ==
 
== Cache ==
 +
{{main|intel/microarchitectures/sandy_bridge#Memory_Hierarchy|l1=Sandy Bridge § Cache}}
 +
{{cache size
 +
|l1 cache=128 KiB
 +
|l1i cache=64 KiB
 +
|l1i break=2x32 KiB
 +
|l1i desc=8-way set associative
 +
|l1d cache=64 KiB
 +
|l1d break=2x32 KiB
 +
|l1d desc=8-way set associative
 +
|l1d policy=write-back
 +
|l2 cache=512 KiB
 +
|l2 break=2x256 KiB
 +
|l2 desc=8-way set associative
 +
|l2 policy=write-back
 +
|l3 cache=3 MiB
 +
|l3 break=2x1.5 MiB
 +
|l3 desc=12-way set associative
 +
|l3 policy=write-back
 +
}}
  
 
== Memory controller ==
 
== Memory controller ==
Line 73: Line 98:
 
|pcie config 3=1x8+2x4
 
|pcie config 3=1x8+2x4
 
}}
 
}}
 +
}}
 +
== Wireless ==
 +
{{wireless links
 +
|4g=yes
 +
|wimax=yes
 
}}
 
}}
  
Line 110: Line 140:
  
 
== Features ==
 
== Features ==
−
{{x86 features}}
+
{{x86 features
 +
|real=Yes
 +
|protected=Yes
 +
|smm=Yes
 +
|fpu=Yes
 +
|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=No
 +
|avx=Yes
 +
|avx2=No
 +
|avx512f=No
 +
|avx512cd=No
 +
|avx512er=No
 +
|avx512pf=No
 +
|avx512bw=No
 +
|avx512dq=No
 +
|avx512vl=No
 +
|avx512ifma=No
 +
|avx512vbmi=No
 +
|avx5124fmaps=No
 +
|avx5124vnniw=No
 +
|avx512vpopcntdq=No
 +
|abm=No
 +
|tbm=No
 +
|bmi1=No
 +
|bmi2=No
 +
|fma3=No
 +
|fma4=No
 +
|aes=No
 +
|rdrand=No
 +
|sha=No
 +
|xop=No
 +
|adx=No
 +
|clmul=Yes
 +
|f16c=No
 +
|tbt1=No
 +
|tbt2=No
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|sst=No
 +
|flex=Yes
 +
|fastmem=Yes
 +
|ivmd=No
 +
|intelnodecontroller=No
 +
|intelnode=No
 +
|kpt=No
 +
|ptt=No
 +
|intelrunsure=No
 +
|mbe=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=Yes
 +
|sipp=No
 +
|att=Yes
 +
|ipt=Yes
 +
|tsx=No
 +
|txt=No
 +
|ht=Yes
 +
|vpro=No
 +
|vtx=Yes
 +
|vtd=No
 +
|ept=Yes
 +
|mpx=No
 +
|sgx=No
 +
|securekey=No
 +
|osguard=No
 +
|intqat=No
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=No
 +
|amdv=No
 +
|amdsme=No
 +
|amdtsme=No
 +
|amdsev=No
 +
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 +
}}

Latest revision as of 16:17, 13 December 2017

Edit Values
Core i3-2312M
General Info
DesignerIntel
ManufacturerIntel
Model Numberi3-2312M
Part NumberFF8062701084601
S-SpecSR09S
MarketMobile
IntroductionJune, 2011 (announced)
June, 2011 (launched)
Release Price$225
ShopAmazon
General Specs
FamilyCore i3
Seriesi3-2000
LockedYes
Frequency2,100 MHz
Bus typeDMI 2.0
Bus rate4 × 5 GT/s
Clock multiplier21
CPUID0x206A7
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSandy Bridge
PlatformSandy Bridge M
ChipsetCougar Point
Core NameSandy Bridge M
Core Family6
Core Model42
Core SteppingJ1
Process32 nm
Transistors624,000,000
TechnologyCMOS
Die149 mm²
Word Size64 bit
Cores2
Threads4
Max Memory16 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power (idle)3.1 W
Vcore0.3 V-1.52 V
TDP35 W
Tjunction0 °C – 100 °C
Tstorage-25 °C – 125 °C
Packaging
PackagerPGA988B (PGA)
Dimension37.5 mm x 37.5 mm
Pitch1 mm
Contacts988
SocketSocket G2

Core i3-2312M is a dual-core entry-level performance mobile x86 microprocessor introduced by Intel in mid-2011. Fabricated on a 32 nm process based on the Sandy Bridge microarchitecture, this processor operates at 2.1 GHz with a TDP of 35 Watts. The i3-2312M supports up to 16 GiB of dual-channel DDR3-1333 memory and incorporates Intel's HD Graphics 3000 integrated graphics operating at 650 MHz with a burst frequency of 1.1 GHz.

This specific model is one of a handful of processors that could be upgraded into a more performant model through Intel's Upgrade Service. Doing so would turn this "Core i3-2312M" into a "Core i3-2393M", increasing the cache and frequency for a modest performance gain.

Cache[edit]

Main article: Sandy Bridge § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB8-way set associativewrite-back
L3$3 MiB
3,072 KiB
3,145,728 B
0.00293 GiB
  2x1.5 MiB12-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1333, DDR3-1066
Supports ECCNo
Max Mem16 GiB
Controllers1
Channels2
Max Bandwidth19.87 GiB/s
20,346.88 MiB/s
21.335 GB/s
21,335.25 MB/s
0.0194 TiB/s
0.0213 TB/s
Bandwidth
Single 9.93 GiB/s
Double 19.87 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 2.0
Max Lanes: 16
Configuration: 1x16, 2x8, 1x8+2x4

Wireless[edit]

Antu network-wireless-connected-100.svgWireless Communications
Cellular
4G
WiMAX Yes

Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUHD Graphics 3000
DesignerIntelDevice ID0x116
Execution Units12Max Displays2
Frequency650 MHz
0.65 GHz
650,000 KHz
Burst Frequency1,100 MHz
1.1 GHz
1,100,000 KHz
OutputDP, eDP, HDMI, SDVO, CRT
Standards
DirectX10.1
OpenGL3.1
DP1.1
eDP1.1
HDMI1.4
Additional Features
Intel Quick Sync Video
Intel InTru 3D
Intel Flexible Display Interface (FDI)
Intel Clear Video HD

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
CLMULCarry-less Multiplication Extension
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
EISTEnhanced SpeedStep Technology
VT-xVT-x (Virtualization)
EPTExtended Page Tables (SLAT)
Flex MemoryFlex Memory Access
FMAFast Memory Access (w\ GMCH)
MWTMy WiFi Technology
ATTAnti-Theft Technology
IPTIdentity Protection Technology
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i3/i3-2312m&oldid=70506"
Facts about "Core i3-2312M - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core i3-2312M - Intel#pcie +
device id0x116 +
integrated gpuHD Graphics 3000 +
integrated gpu base frequency650 MHz (0.65 GHz, 650,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units12 +
integrated gpu max frequency1,100 MHz (1.1 GHz, 1,100,000 KHz) +