From WikiChip
Difference between revisions of "intel/celeron/b815"
(2 intermediate revisions by 2 users not shown) | |||
Line 1: | Line 1: | ||
{{intel title|Celeron B815}} | {{intel title|Celeron B815}} | ||
− | {{ | + | {{chip |
|name=Celeron B815 | |name=Celeron B815 | ||
|no image=Yes | |no image=Yes | ||
Line 49: | Line 49: | ||
|package module 1={{packages/intel/pga-988b}} | |package module 1={{packages/intel/pga-988b}} | ||
}} | }} | ||
− | '''Celeron B815''' is a [[dual-core]] budget mobile [[x86]] microprocessor introduced by [[Intel]] in early [[2012]]. The Celeron B815, which is based on the {{intel|Sandy Bridge|l=arch}} microarchitecture and is manufactured on a [[32 nm process]], operates at 1.6 GHz with a [[TDP]] of 35 W. This chip incorporates Intel's {{intel|HD Graphics (Sandy Bridge)|HD Graphics}} [[integrated graphics]] operating at 650 MHz with a | + | '''Celeron B815''' is a [[dual-core]] budget mobile [[x86]] microprocessor introduced by [[Intel]] in early [[2012]]. The Celeron B815, which is based on the {{intel|Sandy Bridge|l=arch}} microarchitecture and is manufactured on a [[32 nm process]], operates at 1.6 GHz with a [[TDP]] of 35 W. This chip incorporates Intel's {{intel|HD Graphics (Sandy Bridge)|HD Graphics}} [[integrated graphics]] operating at 650 MHz with a burst frequency of 1 GHz. This processor supports 16 GiB of dual-channel DDR3-1333 memory. |
== Cache == | == Cache == | ||
Line 202: | Line 202: | ||
|vtx=Yes | |vtx=Yes | ||
|vtd=No | |vtd=No | ||
− | |ept= | + | |ept=Yes |
|mpx=No | |mpx=No | ||
|sgx=No | |sgx=No |
Latest revision as of 15:13, 17 March 2018
Edit Values | |||||||||||
Celeron B815 | |||||||||||
General Info | |||||||||||
Designer | Intel | ||||||||||
Manufacturer | Intel | ||||||||||
Model Number | B815 | ||||||||||
Part Number | FF8062701159901 | ||||||||||
S-Spec | SR0HZ | ||||||||||
Market | Mobile | ||||||||||
Introduction | January, 2012 (announced) January, 2012 (launched) | ||||||||||
Release Price | $86.00 | ||||||||||
Shop | Amazon | ||||||||||
General Specs | |||||||||||
Family | Celeron | ||||||||||
Series | 800 | ||||||||||
Locked | Yes | ||||||||||
Frequency | 1,600 MHz | ||||||||||
Bus type | DMI 2.0 | ||||||||||
Bus rate | 4 × 5 GT/s | ||||||||||
Clock multiplier | 16 | ||||||||||
CPUID | 0x206A7 | ||||||||||
Microarchitecture | |||||||||||
ISA | x86-64 (x86) | ||||||||||
Microarchitecture | Sandy Bridge | ||||||||||
Platform | Sandy Bridge M | ||||||||||
Chipset | Cougar Point | ||||||||||
Core Name | Sandy Bridge M | ||||||||||
Core Family | 6 | ||||||||||
Core Model | 42 | ||||||||||
Core Stepping | Q0 | ||||||||||
Process | 32 nm | ||||||||||
Transistors | 504,000,000 | ||||||||||
Technology | CMOS | ||||||||||
Die | 131 mm² | ||||||||||
Word Size | 64 bit | ||||||||||
Cores | 2 | ||||||||||
Threads | 2 | ||||||||||
Max Memory | 16 GiB | ||||||||||
Multiprocessing | |||||||||||
Max SMP | 1-Way (Uniprocessor) | ||||||||||
Electrical | |||||||||||
Power (idle) | 3.1 W | ||||||||||
Vcore | 0.3 V-1.52 V | ||||||||||
TDP | 35 W | ||||||||||
Tjunction | 0 °C – 100 °C | ||||||||||
Tstorage | -25 °C – 125 °C | ||||||||||
Packaging | |||||||||||
|
Celeron B815 is a dual-core budget mobile x86 microprocessor introduced by Intel in early 2012. The Celeron B815, which is based on the Sandy Bridge microarchitecture and is manufactured on a 32 nm process, operates at 1.6 GHz with a TDP of 35 W. This chip incorporates Intel's HD Graphics integrated graphics operating at 650 MHz with a burst frequency of 1 GHz. This processor supports 16 GiB of dual-channel DDR3-1333 memory.
Contents
Cache[edit]
- Main article: Sandy Bridge § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
|||||||||||||||||||||||||||||||||||||
|
Memory controller[edit]
Integrated Memory Controller
|
||||||||||||||
|
Expansions[edit]
Expansion Options |
|||||
|
Graphics[edit]
Integrated Graphics Information
|
|||||||||||||||||||||||||||||||||||||||||||||||
|
[Edit] Sandy Bridge (Gen6) Hardware Accelerated Video Capabilities | |||||||
---|---|---|---|---|---|---|---|
Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | ✘ | Main | Main, High | Up to 80 Mbps | |||
MPEG-4 AVC (H.264) | Main | 4.1 | Up to 40 Mbps | Main, High | 4.1 | Up to 40 Mbps | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High, Simple | Up to 40 Mbps |
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
|
||||||||||||||||||||||||||||||||||||||||||||
|
Documents[edit]
Datasheet[edit]
Other[edit]
Facts about "Celeron B815 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Celeron B815 - Intel#pcie + |
device id | 0x0106 + |
has ecc memory support | false + |
has extended page tables support | true + |
has feature | Enhanced SpeedStep Technology +, Intel VT-x +, Extended Page Tables + and Flex Memory Access + |
has intel enhanced speedstep technology | true + |
has intel flex memory access support | true + |
has intel vt-x technology | true + |
has second level address translation support | true + |
integrated gpu | HD Graphics (Sandy Bridge) + |
integrated gpu base frequency | 650 MHz (0.65 GHz, 650,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 6 + |
integrated gpu max frequency | 1,050 MHz (1.05 GHz, 1,050,000 KHz) + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ description | 8-way set associative + |
l3$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
max memory bandwidth | 19.87 GiB/s (20,346.88 MiB/s, 21.335 GB/s, 21,335.25 MB/s, 0.0194 TiB/s, 0.0213 TB/s) + |
max memory channels | 2 + |
supported memory type | DDR3-1333 + and DDR3-1066 + |