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Hi, I am currently working on a seminar thesis regarding the development of superscalar techniques. I would like to use your images of the three stages of the core architecture to explain what techniques are still used in comparison to the P6 architecture. I would really appreciate your permission to use them. I would obviously reference the URLs to the images. Thank you.

Latest revision as of 11:59, 12 June 2019

This is the discussion page for the intel/microarchitectures/skylake (client) page.

Hi, I am currently working on a seminar thesis regarding the development of superscalar techniques. I would like to use your images of the three stages of the core architecture to explain what techniques are still used in comparison to the P6 architecture. I would really appreciate your permission to use them. I would obviously reference the URLs to the images. Thank you.