From WikiChip
Difference between revisions of "intel/celeron/3855u"
m (Bot: moving all {{mpu}} to {{chip}}) |
|||
(11 intermediate revisions by 2 users not shown) | |||
Line 1: | Line 1: | ||
{{intel title|Celeron 3855U}} | {{intel title|Celeron 3855U}} | ||
− | {{ | + | {{chip |
|name=Celeron 3855U | |name=Celeron 3855U | ||
− | + | |image=skylake u (front; standard).png | |
− | |image=skylake ( | ||
|designer=Intel | |designer=Intel | ||
|manufacturer=Intel | |manufacturer=Intel | ||
|model number=3855U | |model number=3855U | ||
+ | |part number=FJ8066201931008 | ||
|s-spec=SR2EV | |s-spec=SR2EV | ||
|market=Mobile | |market=Mobile | ||
|first announced=August 15, 2015 | |first announced=August 15, 2015 | ||
|first launched=December 27, 2015 | |first launched=December 27, 2015 | ||
+ | |release price=$107.00 | ||
|family=Celeron | |family=Celeron | ||
|series=3000 | |series=3000 | ||
Line 42: | Line 43: | ||
|tdp=15 W | |tdp=15 W | ||
|ctdp down=10 W | |ctdp down=10 W | ||
− | |||
|tjunc min=0 °C | |tjunc min=0 °C | ||
|tjunc max=100 °C | |tjunc max=100 °C | ||
Line 49: | Line 49: | ||
|package module 1={{packages/intel/fcbga-1356}} | |package module 1={{packages/intel/fcbga-1356}} | ||
}} | }} | ||
− | '''Celeron 3855U''' is a {{arch|64}} [[dual-core]] budget [[x86]] mobile microprocessor introduced by [[Intel]] in late [[2015]]. Fabricated on a [[14 nm process]] based on the {{intel|Skylake}} microarchitecture, this processor operates at 1.6 GHz. The 3855U has a TDP of 15 W with a configurable-down | + | '''Celeron 3855U''' is a {{arch|64}} [[dual-core]] budget [[x86]] mobile microprocessor introduced by [[Intel]] in late [[2015]]. Fabricated on a [[14 nm process]] based on the {{intel|Skylake}} microarchitecture, this processor operates at 1.6 GHz. The 3855U has a TDP of 15 W with a configurable TDP-down of 10 W. This chip incorporates the {{intel|HD Graphics 510}} GPU operating at 300 MHz with a burst frequency of 900 MHz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory. |
== Cache == | == Cache == | ||
Line 69: | Line 69: | ||
|l3 break=2x1 MiB | |l3 break=2x1 MiB | ||
|l3 policy=write-back | |l3 policy=write-back | ||
+ | }} | ||
+ | |||
+ | == Memory controller == | ||
+ | {{memory controller | ||
+ | |type=DDR4-2133 | ||
+ | |type 2=LPDDR3-1866 | ||
+ | |type 3=DDR3L-1600 | ||
+ | |ecc=No | ||
+ | |max mem=32 GiB | ||
+ | |controllers=1 | ||
+ | |channels=2 | ||
+ | |max bandwidth=31.79 GiB/s | ||
+ | |bandwidth schan=15.89 GiB/s | ||
+ | |bandwidth dchan=31.79 GiB/s | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions | ||
+ | | pcie revision = 2.0 | ||
+ | | pcie lanes = 10 | ||
+ | | pcie config = 1x4 | ||
+ | | pcie config 2 = 2x2 | ||
+ | | pcie config 3 = 1x2+2x1 | ||
+ | | pcie config 4 = 4x1 | ||
}} | }} | ||
== Graphics == | == Graphics == | ||
− | {{integrated | + | {{integrated graphics |
− | | gpu | + | | gpu = HD Graphics 510 |
− | | displays | + | | device id = 0x1906 |
− | | frequency | + | | designer = Intel |
− | | max frequency | + | | execution units = 12 |
− | | | + | | max displays = 3 |
− | | output edp | + | | max memory = 32 GiB |
− | | output dp | + | | frequency = 300 MHz |
− | | output hdmi | + | | max frequency = 900 MHz |
− | | output vga | + | |
− | | output dvi | + | | output crt = |
+ | | output sdvo = | ||
+ | | output dsi = | ||
+ | | output edp = Yes | ||
+ | | output dp = Yes | ||
+ | | output hdmi = Yes | ||
+ | | output vga = | ||
+ | | output dvi = Yes | ||
+ | |||
| directx ver = 12 | | directx ver = 12 | ||
| opengl ver = 4.4 | | opengl ver = 4.4 | ||
+ | | opencl ver = 2.0 | ||
+ | | hdmi ver = 1.4a | ||
+ | | dp ver = 1.2 | ||
+ | | edp ver = 1.3 | ||
| max res hdmi = 4096x2304 | | max res hdmi = 4096x2304 | ||
| max res hdmi freq = 24 Hz | | max res hdmi freq = 24 Hz | ||
Line 93: | Line 129: | ||
| max res vga = | | max res vga = | ||
| max res vga freq = | | max res vga freq = | ||
− | |||
− | + | | features = Yes | |
− | + | | intel quick sync = Yes | |
− | + | | intel intru 3d = | |
− | | | + | | intel insider = |
− | | | + | | intel widi = |
− | | | + | | intel fdi = |
− | | | + | | intel clear video = |
− | | | + | | intel clear video hd = Yes |
− | | | ||
− | | | ||
− | | | ||
}} | }} | ||
+ | {{skylake hardware accelerated video table|col=1}} | ||
− | == | + | == Features == |
− | {{ | + | {{x86 features |
− | | | + | |real=Yes |
− | | | + | |protected=Yes |
− | | | + | |smm=Yes |
− | | | + | |fpu=Yes |
− | | | + | |x8616=Yes |
− | | | + | |x8632=Yes |
− | + | |x8664=Yes | |
+ | |nx=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=No | ||
+ | |avx=No | ||
+ | |avx2=No | ||
− | == | + | |abm=Yes |
− | + | |tbm=No | |
− | | | + | |bmi1=Yes |
− | | | + | |bmi2=Yes |
− | | | + | |fma3=No |
− | | | + | |fma4=No |
− | | | + | |aes=Yes |
− | | tbt2 | + | |rdrand=Yes |
− | | | + | |sha=No |
− | | | + | |xop=No |
− | | | + | |adx=Yes |
− | | | + | |clmul=Yes |
− | | | + | |f16c=Yes |
− | | | + | |tbt1=No |
− | | | + | |tbt2=No |
− | | | + | |tbmt3=No |
− | | | + | |bpt=No |
− | | | + | |eist=Yes |
− | | | + | |sst=No |
− | | | + | |flex=Yes |
− | | | + | |fastmem=No |
− | | | + | |isrt=Yes |
− | | | + | |sba=No |
− | | | + | |mwt=Yes |
− | | | + | |sipp=No |
− | | | + | |att=No |
− | | | + | |ipt=Yes |
− | | | + | |tsx=No |
+ | |txt=No | ||
+ | |ht=No | ||
+ | |vpro=No | ||
+ | |vtx=Yes | ||
+ | |vtd=Yes | ||
+ | |ept=Yes | ||
+ | |mpx=No | ||
+ | |sgx=Yes | ||
+ | |securekey=Yes | ||
+ | |osguard=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
}} | }} |
Latest revision as of 15:15, 13 December 2017
Edit Values | |||||||||||||
Celeron 3855U | |||||||||||||
General Info | |||||||||||||
Designer | Intel | ||||||||||||
Manufacturer | Intel | ||||||||||||
Model Number | 3855U | ||||||||||||
Part Number | FJ8066201931008 | ||||||||||||
S-Spec | SR2EV | ||||||||||||
Market | Mobile | ||||||||||||
Introduction | August 15, 2015 (announced) December 27, 2015 (launched) | ||||||||||||
Release Price | $107.00 | ||||||||||||
Shop | Amazon | ||||||||||||
General Specs | |||||||||||||
Family | Celeron | ||||||||||||
Series | 3000 | ||||||||||||
Locked | Yes | ||||||||||||
Frequency | 1,600 MHz | ||||||||||||
Bus type | OPI | ||||||||||||
Bus rate | 4 GT/s | ||||||||||||
Clock multiplier | 16 | ||||||||||||
Microarchitecture | |||||||||||||
ISA | x86-64 (x86) | ||||||||||||
Microarchitecture | Skylake | ||||||||||||
Core Name | Skylake U | ||||||||||||
Core Family | 6 | ||||||||||||
Core Model | 78 | ||||||||||||
Core Stepping | D1 | ||||||||||||
Process | 14 nm | ||||||||||||
Transistors | 1,750,000,000 | ||||||||||||
Technology | CMOS | ||||||||||||
Die | 98.57 mm² 10.3 mm × 9.57 mm | ||||||||||||
MCP | Yes (2 dies) | ||||||||||||
Word Size | 64 bit | ||||||||||||
Cores | 2 | ||||||||||||
Threads | 2 | ||||||||||||
Max Memory | 32 GiB | ||||||||||||
Multiprocessing | |||||||||||||
Max SMP | 1-Way (Uniprocessor) | ||||||||||||
Electrical | |||||||||||||
Vcore | 0.55 V-1.52 V | ||||||||||||
TDP | 15 W | ||||||||||||
cTDP down | 10 W | ||||||||||||
Tjunction | 0 °C – 100 °C | ||||||||||||
Tstorage | -25 °C – 125 °C | ||||||||||||
Packaging | |||||||||||||
|
Celeron 3855U is a 64-bit dual-core budget x86 mobile microprocessor introduced by Intel in late 2015. Fabricated on a 14 nm process based on the Skylake microarchitecture, this processor operates at 1.6 GHz. The 3855U has a TDP of 15 W with a configurable TDP-down of 10 W. This chip incorporates the HD Graphics 510 GPU operating at 300 MHz with a burst frequency of 900 MHz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory.
Cache[edit]
- Main article: Skylake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
|||||||||||||||||||||||||||||||||||||
|
Memory controller[edit]
Integrated Memory Controller
|
||||||||||||||
|
Expansions[edit]
Expansion Options
|
||||||||
|
Graphics[edit]
Integrated Graphics Information
|
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
[Edit] Skylake (Gen9) Hardware Accelerated Video Capabilities | |||||||
---|---|---|---|---|---|---|---|
Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, SHP, MHP | 5.1 | 2160p (4K) | |
JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
HEVC (H.265) | Main | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High | 3840x3840 | |||
VP8 | Unified | Unified | - | 0 | Unified | 1080p | |
VP9 | ✘ | 0 | Unified | 2160p (4K) |
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
|
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
Facts about "Celeron 3855U - Intel"
has ecc memory support | false + |
has feature | integrated gpu + |
integrated gpu | Intel HD Graphics 510 + |
integrated gpu base frequency | 300 MHz (0.3 GHz, 300,000 KHz) + |
integrated gpu max frequency | 900 MHz (0.9 GHz, 900,000 KHz) + |
integrated gpu max memory | 1,700 MiB (1,740,800 KiB, 1,782,579,200 B, 1.66 GiB) + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
max memory bandwidth | 31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
max memory channels | 2 + |
supported memory type | DDR4-2133 +, LPDDR3-1866 + and DDR3L-1600 + |