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Difference between revisions of "intel/core i7/i7-6650u"
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{{intel title|Core i7-6650U}} | {{intel title|Core i7-6650U}} | ||
− | {{ | + | {{chip |
|name=Core i7-6650U | |name=Core i7-6650U | ||
− | + | |image=skylake u (front; iris).png | |
− | |image=skylake ( | ||
|designer=Intel | |designer=Intel | ||
|manufacturer=Intel | |manufacturer=Intel | ||
Line 10: | Line 9: | ||
|s-spec=SR2KA | |s-spec=SR2KA | ||
|market=Mobile | |market=Mobile | ||
− | |first announced= | + | |first announced=September 1, 2015 |
− | |first launched= | + | |first launched=September 27, 2015 |
+ | |release price=$415.00 | ||
|family=Core i7 | |family=Core i7 | ||
|series=i7-6000 | |series=i7-6000 | ||
Line 17: | Line 17: | ||
|frequency=2,200 MHz | |frequency=2,200 MHz | ||
|turbo frequency1=3,400 MHz | |turbo frequency1=3,400 MHz | ||
− | |turbo frequency2= | + | |turbo frequency2=3,200 MHz |
|bus type=OPI | |bus type=OPI | ||
|bus rate=4 GT/s | |bus rate=4 GT/s | ||
Line 31: | Line 31: | ||
|technology=CMOS | |technology=CMOS | ||
|mcp=Yes | |mcp=Yes | ||
− | |die count= | + | |die count=3 |
|word size=64 bit | |word size=64 bit | ||
|core count=2 | |core count=2 | ||
Line 41: | Line 41: | ||
|tdp=15 W | |tdp=15 W | ||
|ctdp down=9.5 W | |ctdp down=9.5 W | ||
− | |||
− | |||
|tjunc min=0 °C | |tjunc min=0 °C | ||
|tjunc max=100 °C | |tjunc max=100 °C | ||
Line 50: | Line 48: | ||
|turbo frequency=Yes | |turbo frequency=Yes | ||
}} | }} | ||
− | + | '''Core i7-6650U''' is a {{arch|64}} [[dual-core]] high-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in late [[2015]]. Fabricated on a [[14 nm process]] based on the {{intel|Skylake}} microarchitecture, this processor operates at 2.2 GHz with a {{intel|turbo boost}} of up to 3.4 GHz. The i7-6650U has a TDP of 15 W with a configurable TDP-down of 9.5 W. This chip incorporates the {{intel|Iris Graphics 540}} GPU operating at 300 MHz with a burst frequency of 1.05 GHz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory. The 6650U comes with an additional 64 MiB of [[embedded DRAM]] side cache. | |
== Cache == | == Cache == | ||
− | {{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake | + | {{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}} |
− | {{cache | + | {{cache size |
+ | |l1 cache=128 KiB | ||
|l1i cache=64 KiB | |l1i cache=64 KiB | ||
|l1i break=2x32 KiB | |l1i break=2x32 KiB | ||
|l1i desc=8-way set associative | |l1i desc=8-way set associative | ||
− | |||
|l1d cache=64 KiB | |l1d cache=64 KiB | ||
|l1d break=2x32 KiB | |l1d break=2x32 KiB | ||
|l1d desc=8-way set associative | |l1d desc=8-way set associative | ||
− | |l1d | + | |l1d policy=write-back |
|l2 cache=512 KiB | |l2 cache=512 KiB | ||
|l2 break=2x256 KiB | |l2 break=2x256 KiB | ||
|l2 desc=4-way set associative | |l2 desc=4-way set associative | ||
− | |l2 | + | |l2 policy=write-back |
|l3 cache=4 MiB | |l3 cache=4 MiB | ||
− | |l3 | + | |l3 break=2x2 MiB |
+ | |l3 policy=write-back | ||
+ | |l4 cache=64 MiB | ||
}} | }} | ||
− | ==Graphics== | + | == Memory controller == |
− | {{integrated | + | {{memory controller |
− | | gpu = | + | |type=DDR4-2133 |
+ | |type 2=LPDDR3-1866 | ||
+ | |type 3=DDR3L-1600 | ||
+ | |ecc=No | ||
+ | |max mem=32 GiB | ||
+ | |controllers=1 | ||
+ | |channels=2 | ||
+ | |max bandwidth=31.79 GiB/s | ||
+ | |bandwidth schan=15.89 GiB/s | ||
+ | |bandwidth dchan=31.79 GiB/s | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions | ||
+ | | pcie revision = 3.0 | ||
+ | | pcie lanes = 12 | ||
+ | | pcie config = 1x4 | ||
+ | | pcie config 2 = 2x2 | ||
+ | | pcie config 3 = 1x2+2x1 | ||
+ | | pcie config 4 = 4x1 | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | The Iris Graphics 540 includes 64 MiB of side eDRAM cache in addition to everything else. | ||
+ | {{integrated graphics | ||
+ | | gpu = Iris Graphics 540 | ||
+ | | device id = 0x1926 | ||
+ | | designer = Intel | ||
| execution units = 48 | | execution units = 48 | ||
− | | displays | + | | max displays = 3 |
+ | | max memory = 32 GiB | ||
| frequency = 300 MHz | | frequency = 300 MHz | ||
− | | max frequency = | + | | max frequency = 1,050 MHz |
− | |||
| output crt = | | output crt = | ||
Line 89: | Line 116: | ||
| output dvi = Yes | | output dvi = Yes | ||
− | | directx ver | + | | directx ver = 12 |
− | | opengl ver | + | | opengl ver = 4.4 |
− | | opencl ver | + | | opencl ver = 2.0 |
− | + | | hdmi ver = 1.4a | |
− | | hdmi ver | + | | dp ver = 1.2 |
− | | | + | | edp ver = 1.3 |
− | + | | max res hdmi = 4096x2304 | |
− | + | | max res hdmi freq = 24 Hz | |
− | + | | max res dp = 4096x2304 | |
− | | edp ver | + | | max res dp freq = 60 Hz |
− | + | | max res edp = 4096x2304 | |
− | | max res hdmi | + | | max res edp freq = 60 Hz |
− | | max res hdmi freq | + | | max res vga = |
− | | max res | + | | max res vga freq = |
− | |||
− | |||
− | |||
− | |||
− | | max res dp freq | ||
− | | max res edp | ||
− | | max res edp freq | ||
− | | max res vga | ||
− | | max res vga freq | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | + | | features = Yes | |
− | + | | intel quick sync = Yes | |
− | | | + | | intel intru 3d = Yes |
− | | | + | | intel insider = |
− | | | + | | intel widi = |
− | | | + | | intel fdi = |
− | | | + | | intel clear video = Yes |
− | + | | intel clear video hd = Yes | |
− | | | ||
− | |||
− | |||
− | |||
− | | | ||
− | | | ||
}} | }} | ||
+ | {{skylake hardware accelerated video table|col=1}} | ||
− | == | + | == Features == |
− | {{ | + | {{x86 features |
− | | | + | |real=Yes |
− | | | + | |protected=Yes |
− | | | + | |smm=Yes |
− | | | + | |fpu=Yes |
− | | | + | |x8616=Yes |
− | | | + | |x8632=Yes |
− | | | + | |x8664=Yes |
− | | | + | |nx=Yes |
− | | | + | |mmx=Yes |
− | | | + | |emmx=Yes |
− | | | + | |sse=Yes |
− | | | + | |sse2=Yes |
− | + | |sse3=Yes | |
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=No | ||
+ | |avx=Yes | ||
+ | |avx2=Yes | ||
− | == | + | |abm=Yes |
− | + | |tbm=No | |
− | | | + | |bmi1=Yes |
− | | | + | |bmi2=Yes |
− | | | + | |fma3=Yes |
− | | | + | |fma4=No |
− | | | + | |aes=Yes |
− | | | + | |rdrand=Yes |
− | | tbt1 | + | |sha=No |
− | | tbt2 | + | |xop=No |
− | | bpt | + | |adx=Yes |
− | | | + | |clmul=Yes |
− | | | + | |f16c=Yes |
− | | | + | |tbt1=No |
− | | | + | |tbt2=Yes |
− | | | + | |tbmt3=No |
− | | | + | |bpt=No |
− | | | + | |eist=Yes |
− | | | + | |sst=No |
− | | | + | |flex=Yes |
− | | | + | |fastmem=No |
− | | | + | |isrt=Yes |
− | | | + | |sba=No |
− | | | + | |mwt=Yes |
− | | | + | |sipp=Yes |
− | | | + | |att=No |
− | | | + | |ipt=Yes |
− | | | + | |tsx=Yes |
− | | | + | |txt=Yes |
− | | | + | |ht=Yes |
− | | | + | |vpro=Yes |
− | | | + | |vtx=Yes |
− | | | + | |vtd=Yes |
− | | | + | |ept=Yes |
− | | | + | |mpx=Yes |
− | | | + | |sgx=Yes |
+ | |securekey=Yes | ||
+ | |osguard=Yes | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
}} | }} |
Latest revision as of 15:22, 13 December 2017
Edit Values | |||||||||||||
Core i7-6650U | |||||||||||||
General Info | |||||||||||||
Designer | Intel | ||||||||||||
Manufacturer | Intel | ||||||||||||
Model Number | i7-6650U | ||||||||||||
Part Number | FJ8066202499212 | ||||||||||||
S-Spec | SR2KA | ||||||||||||
Market | Mobile | ||||||||||||
Introduction | September 1, 2015 (announced) September 27, 2015 (launched) | ||||||||||||
Release Price | $415.00 | ||||||||||||
Shop | Amazon | ||||||||||||
General Specs | |||||||||||||
Family | Core i7 | ||||||||||||
Series | i7-6000 | ||||||||||||
Locked | Yes | ||||||||||||
Frequency | 2,200 MHz | ||||||||||||
Turbo Frequency | Yes | ||||||||||||
Turbo Frequency | 3,400 MHz (1 core), 3,200 MHz (2 cores) | ||||||||||||
Bus type | OPI | ||||||||||||
Bus rate | 4 GT/s | ||||||||||||
Clock multiplier | 22 | ||||||||||||
Microarchitecture | |||||||||||||
ISA | x86-64 (x86) | ||||||||||||
Microarchitecture | Skylake | ||||||||||||
Core Name | Skylake U | ||||||||||||
Core Family | 6 | ||||||||||||
Core Model | 78 | ||||||||||||
Core Stepping | K1 | ||||||||||||
Process | 14 nm | ||||||||||||
Technology | CMOS | ||||||||||||
MCP | Yes (3 dies) | ||||||||||||
Word Size | 64 bit | ||||||||||||
Cores | 2 | ||||||||||||
Threads | 4 | ||||||||||||
Max Memory | 32 GiB | ||||||||||||
Multiprocessing | |||||||||||||
Max SMP | 1-Way (Uniprocessor) | ||||||||||||
Electrical | |||||||||||||
Vcore | 0.55 V-1.52 V | ||||||||||||
TDP | 15 W | ||||||||||||
cTDP down | 9.5 W | ||||||||||||
Tjunction | 0 °C – 100 °C | ||||||||||||
Tstorage | -25 °C – 125 °C | ||||||||||||
Packaging | |||||||||||||
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Core i7-6650U is a 64-bit dual-core high-end performance x86 mobile microprocessor introduced by Intel in late 2015. Fabricated on a 14 nm process based on the Skylake microarchitecture, this processor operates at 2.2 GHz with a turbo boost of up to 3.4 GHz. The i7-6650U has a TDP of 15 W with a configurable TDP-down of 9.5 W. This chip incorporates the Iris Graphics 540 GPU operating at 300 MHz with a burst frequency of 1.05 GHz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory. The 6650U comes with an additional 64 MiB of embedded DRAM side cache.
Cache[edit]
- Main article: Skylake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options
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Graphics[edit]
The Iris Graphics 540 includes 64 MiB of side eDRAM cache in addition to everything else.
Integrated Graphics Information
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[Edit] Skylake (Gen9) Hardware Accelerated Video Capabilities | |||||||
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Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, SHP, MHP | 5.1 | 2160p (4K) | |
JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
HEVC (H.265) | Main | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High | 3840x3840 | |||
VP8 | Unified | Unified | - | 0 | Unified | 1080p | |
VP9 | ✘ | 0 | Unified | 2160p (4K) |
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Facts about "Core i7-6650U - Intel"
has feature | integrated gpu + |
integrated gpu | Intel Iris Graphics 540 + |
integrated gpu base frequency | 300 MHz (0.3 GHz, 300,000 KHz) + |
integrated gpu max frequency | 1,050 MHz (1.05 GHz, 1,050,000 KHz) + |
integrated gpu max memory | 32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ description | 12-way set associative + |
l3$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |