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Difference between revisions of "intel/xeon e5/e5-2650 v4"
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{{intel title|Xeon E5-2650 v4}} | {{intel title|Xeon E5-2650 v4}} | ||
− | {{ | + | {{chip |
| name = Xeon E5-2650 v4 | | name = Xeon E5-2650 v4 | ||
| no image = Yes | | no image = Yes | ||
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| turbo frequency = Yes | | turbo frequency = Yes | ||
| turbo frequency1 = 2,900 MHz | | turbo frequency1 = 2,900 MHz | ||
− | | turbo frequency2 = | + | | turbo frequency2 = |
+ | | turbo frequency3 = | ||
+ | | turbo frequency4 = | ||
+ | | turbo frequency5 = | ||
+ | | turbo frequency6 = | ||
+ | | turbo frequency7 = | ||
+ | | turbo frequency8 = | ||
+ | | turbo frequency9 = | ||
+ | | turbo frequency10 = 2,500 MHz | ||
+ | | turbo frequency11 = 2,500 MHz | ||
+ | | turbo frequency12 = 2,500 MHz | ||
| bus type = QPI | | bus type = QPI | ||
| bus speed = 4,800 MHz | | bus speed = 4,800 MHz | ||
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== Expansions == | == Expansions == | ||
− | {{ | + | {{expansions |
| pcie revision = 3.0 | | pcie revision = 3.0 | ||
| pcie lanes = 40 | | pcie lanes = 40 | ||
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== Features == | == Features == | ||
− | {{ | + | {{x86 features |
| em64t = Yes | | em64t = Yes | ||
| nx = Yes | | nx = Yes | ||
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| intel at = | | intel at = | ||
| intel ipt = | | intel ipt = | ||
+ | }} | ||
+ | |||
+ | == Benchmarks == | ||
+ | {{benchmarks main | ||
+ | | | ||
+ | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171002-00075.html|test_timestamp=2017-10-03 11:47:03-0400|chip_count=2|core_count=24|copies_count=48|vendor=Inspur Corporation|system=Inspur NF5170M4 (Intel Xeon E5-2650 v4)|SPECrate2017_int_base=105|SPECrate2017_int_peak=112}} | ||
}} | }} |
Latest revision as of 22:36, 26 March 2023
Edit Values | |
Xeon E5-2650 v4 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | E5-2650 v4 |
Part Number | CM8066002031103, BX80660E52650V4 |
S-Spec | SR2N3 QK8Y (QS) |
Market | Server |
Introduction | June 20, 2016 (announced) June 20, 2016 (launched) |
Release Price | $1166.00 |
Shop | Amazon |
General Specs | |
Family | Xeon E5 |
Series | E5-2000 |
Locked | Yes |
Frequency | 2,200 MHz |
Turbo Frequency | Yes |
Turbo Frequency | 2,900 MHz (1 core), 2,500 MHz (10 cores), 2,500 MHz (11 cores), 2,500 MHz (12 cores) |
Bus type | QPI |
Bus speed | 4,800 MHz |
Bus rate | 2 × 9.6 GT/s |
Clock multiplier | 22 |
CPUID | 406F1 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Broadwell |
Platform | Grantley EP 2S |
Chipset | C610 Series |
Core Name | Broadwell EP |
Core Family | 6 |
Core Model | 4F |
Core Stepping | M0 |
Process | 14 nm |
Transistors | 4,700,000,000 |
Technology | CMOS |
Die | 306.18 mm² |
Word Size | 64 bit |
Cores | 12 |
Threads | 24 |
Max Memory | 1,536 GiB |
Multiprocessing | |
Max SMP | 2-Way (Multiprocessor) |
Electrical | |
Vcore | 1.82 V |
VI/O | 1.2 V ± 3% |
TDP | 105 W |
Tcase | 0 °C – 80 °C |
Tstorage | -25 °C – 125 °C |
The Xeon E5-2650 v4 is a 64-bit dodeca-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for advanced 2S environments (1U square form factor). Operating at 2.2 GHz with a turbo boost frequency of 2.9 GHz for a single active core, this MPU has a TDP of 105 W and is manufactured on a 14 nm process (based on Broadwell).
Cache[edit]
- Main article: Broadwell § Cache
Cache Info [Edit Values] | ||
L1I$ | 384 KiB 393,216 B 0.375 MiB |
12x32 KiB 8-way set associative (per core, write-back) |
L1D$ | 384 KiB 393,216 B 0.375 MiB |
12x32 KiB 8-way set associative (per core, write-back) |
L2$ | 3 MiB 3,072 KiB 3,145,728 B 0.00293 GiB |
12x256 KiB 8-way set associative (per core, write-back) |
L3$ | 30 MiB 30,720 KiB 31,457,280 B 0.0293 GiB |
12x2.5 MiB 20-way set associative (shared, per core, write-back) |
Graphics[edit]
This microprocessor has no integrated graphics processing unit.
Memory controller[edit]
Integrated Memory Controller | |
Type | DDR4-2400 |
Controllers | 1 |
Channels | 4 |
ECC Support | Yes |
Max bandwidth | 71.53 GiB/s |
Bandwidth (single) | 17.88 GiB/s |
Bandwidth (dual) | 35.76 GiB/s |
Max memory | 1,536 GiB |
Physical Address Extensions | 46 bit |
Expansions[edit]
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Expansion Options
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Features[edit]
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Benchmarks[edit]
Test: SPEC CPU2017
Tested: 2017-10-03 11:47:03-0400
Chips: 2, Cores: 24, Copies: 48
Vendor: Inspur Corporation
System: Inspur NF5170M4 (Intel Xeon E5-2650 v4)
Tested: 2017-10-03 11:47:03-0400
Chips: 2, Cores: 24, Copies: 48
![benchmarks.svg](/w/images/thumb/b/b8/benchmarks.svg/64px-benchmarks.svg.png)
System: Inspur NF5170M4 (Intel Xeon E5-2650 v4)
SPECrate2017_int_base: 105
SPECrate2017_int_peak: 112
Facts about "Xeon E5-2650 v4 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon E5-2650 v4 - Intel + |
l1d$ description | 8-way set associative + |
l1d$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) + |
l3$ description | 20-way set associative + |
l3$ size | 30 MiB (30,720 KiB, 31,457,280 B, 0.0293 GiB) + |