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Difference between revisions of "mediatek/helio/mt6755"
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{{mediatek title|Helio P10 (MT6755)}} | {{mediatek title|Helio P10 (MT6755)}} | ||
− | {{ | + | {{chip |
− | | name | + | |name=Helio P10 |
− | | no image | + | |no image=Yes |
− | + | |designer=MediaTek | |
− | + | |designer 2=ARM Holdings | |
− | + | |manufacturer=TSMC | |
− | | designer | + | |model number=P10 |
− | | designer 2 | + | |part number=MT6755 |
− | | manufacturer | + | |part number 2=MTK6755 |
− | | model number | + | |market=Mobile |
− | | part number | + | |market 2=Embedded |
− | | part number 2 | + | |first announced=June 1, 2015 |
− | | market | + | |first launched=January, 2016 |
− | | market 2 | + | |family=Helio |
− | | first announced | + | |series=Helio P |
− | | first launched | + | |frequency=2,000 MHz |
− | + | |frequency 2=1,200 MHz | |
− | + | |bus type=AMBA 4 AXI | |
− | + | |isa=ARMv8 | |
− | + | |isa family=ARM | |
− | | family | + | |microarch=Cortex-A53 |
− | | series | + | |core name=Cortex-A53 |
− | + | |process=28 nm | |
− | | frequency | + | |technology=CMOS |
− | | frequency 2 | + | |word size=64 bit |
− | | bus type | + | |core count=8 |
− | | | + | |thread count=8 |
− | + | |max cpus=1 | |
− | + | |max memory=4 GiB | |
− | + | |v core=1 V | |
− | + | |v io=1.8 V | |
− | | isa family | + | |v io 2=2.8 V |
− | + | |v io 3=3.3 V | |
− | | microarch | + | |temp min=-20 °C |
− | + | |temp max=80 °C | |
− | + | |tjunc max=125 °C | |
− | | core name | + | |tstorage min=0 °C |
− | + | |tstorage max=125 °C | |
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− | | technology | ||
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− | | max cpus | ||
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− | | v io | ||
− | | v io 2 | ||
− | | v io 3 | ||
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− | | temp min | ||
− | | temp max | ||
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}} | }} | ||
− | '''Helio P10''' ('''MT6755''') is a {{arch|64}} [[octa-core]] [[ARM]] [[LTE]] system on a chip designed by [[MediaTek]] and introduced in early-[[2016]]. This SoC, which incorporates eight {{armh|Cortex-A53|l=arch}} cores and is manufactured on [[TSMC]]'s [[28 nm process]], operates at up to 2 GHz and supports single-channel LPDDR3- | + | '''Helio P10''' ('''MT6755''') is a {{arch|64}} [[octa-core]] [[ARM]] [[LTE]] system on a chip designed by [[MediaTek]] and introduced in early-[[2016]]. This SoC, which incorporates eight {{armh|Cortex-A53|l=arch}} cores and is manufactured on [[TSMC]]'s [[28 nm process]], operates at up to 2 GHz and supports up to 4 GiB of single-channel LPDDR3-1866 memory. This chip incorporates the {{imgtec|Mali-T860}} [[IGP]] operating at 700 MHz. This SoC has a modem supporting [[LTE]] User Equipment (UE) category 6. |
This processor is made of two independent clusters of {{armh|Cortex-A53|l=arch}} with four cores each linked together via a {{armh|CCI-400}}. The two clusters have a maximum operating frequency of 2 GHz and 1.2 GHz respectively. | This processor is made of two independent clusters of {{armh|Cortex-A53|l=arch}} with four cores each linked together via a {{armh|CCI-400}}. The two clusters have a maximum operating frequency of 2 GHz and 1.2 GHz respectively. | ||
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== Memory controller == | == Memory controller == | ||
{{memory controller | {{memory controller | ||
− | |type=LPDDR3- | + | |type=LPDDR3-1866 |
|ecc=No | |ecc=No | ||
|max mem=4 GiB | |max mem=4 GiB | ||
|controllers=1 | |controllers=1 | ||
|channels=1 | |channels=1 | ||
+ | |width=32 bit | ||
|max bandwidth=6.95 GiB/s | |max bandwidth=6.95 GiB/s | ||
|bandwidth schan=6.95 GiB/s | |bandwidth schan=6.95 GiB/s | ||
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== Utilizing devices == | == Utilizing devices == | ||
+ | {{collist | ||
+ | |count = 2 | ||
+ | | | ||
* [[used by::Alcatel Flash Plus 2]] | * [[used by::Alcatel Flash Plus 2]] | ||
* [[used by::Archos Diamond 2 Plus]] | * [[used by::Archos Diamond 2 Plus]] | ||
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* [[used by::Gionee S8]] | * [[used by::Gionee S8]] | ||
* [[used by::HTC Desire 10 Pro]] | * [[used by::HTC Desire 10 Pro]] | ||
+ | * [[used by::HTC U Play]] | ||
+ | * [[used by::HTC One A9s]] | ||
* [[used by::iMan Victor]] | * [[used by::iMan Victor]] | ||
* [[used by::Lenovo K5 Note]] | * [[used by::Lenovo K5 Note]] | ||
+ | * [[used by::LG Stylus 3]] | ||
* [[used by::Meizu M3E]] | * [[used by::Meizu M3E]] | ||
* [[used by::Meizu M3 Max]] | * [[used by::Meizu M3 Max]] | ||
Line 221: | Line 181: | ||
* [[used by::Meizu U20]] | * [[used by::Meizu U20]] | ||
* [[used by::Nomu S30]] | * [[used by::Nomu S30]] | ||
+ | * [[used by::Nokia 5.1]] | ||
* [[used by::Oppo F1 Plus]] | * [[used by::Oppo F1 Plus]] | ||
* [[used by::Oppo R9]] | * [[used by::Oppo R9]] | ||
Line 226: | Line 187: | ||
* [[used by::Sony Xperia XA Ultra]] | * [[used by::Sony Xperia XA Ultra]] | ||
* [[used by::TCL Flash Plus 2]] | * [[used by::TCL Flash Plus 2]] | ||
+ | * [[used by::TP-Link Neffos X1]] | ||
* [[used by::TP-Link Neffos X1 Max]] | * [[used by::TP-Link Neffos X1 Max]] | ||
* [[used by::Ulefone Future]] | * [[used by::Ulefone Future]] | ||
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* [[used by::Wolder WIAM #65]] | * [[used by::Wolder WIAM #65]] | ||
* [[used by::ZTE Nubia N1]] | * [[used by::ZTE Nubia N1]] | ||
− | + | * [[used by:: Motorola Moto M]] | |
+ | * [[used by:: Gionee A1]] | ||
+ | }} | ||
{{expand list}} | {{expand list}} |
Latest revision as of 17:41, 15 August 2020
Edit Values | |
Helio P10 | |
General Info | |
Designer | MediaTek, ARM Holdings |
Manufacturer | TSMC |
Model Number | P10 |
Part Number | MT6755, MTK6755 |
Market | Mobile, Embedded |
Introduction | June 1, 2015 (announced) January, 2016 (launched) |
General Specs | |
Family | Helio |
Series | Helio P |
Frequency | 2,000 MHz, 1,200 MHz |
Bus type | AMBA 4 AXI |
Microarchitecture | |
ISA | ARMv8 (ARM) |
Microarchitecture | Cortex-A53 |
Core Name | Cortex-A53 |
Process | 28 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 8 |
Threads | 8 |
Max Memory | 4 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Vcore | 1 V |
VI/O | 1.8 V, 2.8 V, 3.3 V |
OP Temperature | -20 °C – 80 °C |
Tjunction | – 125 °C |
Tstorage | 0 °C – 125 °C |
Helio P10 (MT6755) is a 64-bit octa-core ARM LTE system on a chip designed by MediaTek and introduced in early-2016. This SoC, which incorporates eight Cortex-A53 cores and is manufactured on TSMC's 28 nm process, operates at up to 2 GHz and supports up to 4 GiB of single-channel LPDDR3-1866 memory. This chip incorporates the Mali-T860 IGP operating at 700 MHz. This SoC has a modem supporting LTE User Equipment (UE) category 6.
This processor is made of two independent clusters of Cortex-A53 with four cores each linked together via a CCI-400. The two clusters have a maximum operating frequency of 2 GHz and 1.2 GHz respectively.
Contents
Cache[edit]
- Main article: Cortex-A53 § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
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Integrated Memory Controller
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Expansions[edit]
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Expansion Options
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Graphics[edit]
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Integrated Graphics Information
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Wireless[edit]
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Cellular | |||||||||||||
2G |
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3G |
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4G |
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Image[edit]
- Integrated image signal processor supports 21 MP
- Supports image stabilization
- Supports video stabilization
- Supports noise reduction
- Supports lens shading correction
- Supports AE/AWB/AF
- Supports edge enhancement
- Supports face detection and visual tracking
- Hardware JPEG encoder
Video[edit]
- HEVC decoder 4k2k @ 30fps
- H.264 decoder (30fps/40Mbps)
- Sorenson H.263/H.263 decoder (1080p @ 60fps/40Mbps)
- MPEG-4 SP/ASP decoder (1080p @ 60fps/40Mbps)
- DIVX4/DIVX5/DIVX6/DIVX HD/XVID decoder (1080p @ 60fps/40Mbps)
- VP8 / VC-1 decoders
- MPEG-4 / H.263 / H.264 / HEVC encoders
Audio[edit]
- Audio content sampling rates 8kHz to 192kHz
- Audio content sampling format 8-bit/16-bit/24-bit Mono/Stereo
- I2S, PCM
- Encode: AMR-NB, AMR-WB, AAC, OGG, ADPCM
- Decode: WAV, MP3, MP2, AAC, AMR-NB, AMR-WB, MIDI, Vorbis, APE, AAC-plus v1, AAC-plus v2, FLAC, WMA, ADPCM
- 7.1 channel MHL output
Utilizing devices[edit]
- Alcatel Flash Plus 2
- Archos Diamond 2 Plus
- Blackview BV6000
- Blackview R7
- BLU Pure XR
- BLU Vivo 6
- Elephone M3
- Elephone P9000
- Gionee M6 Plus
- Gionee S8
- HTC Desire 10 Pro
- HTC U Play
- HTC One A9s
- iMan Victor
- Lenovo K5 Note
- LG Stylus 3
- Meizu M3E
- Meizu M3 Max
- Meizu M3 Note
- Meizu U20
- Nomu S30
- Nokia 5.1
- Oppo F1 Plus
- Oppo R9
- Sony Xperia XA
- Sony Xperia XA Ultra
- TCL Flash Plus 2
- TP-Link Neffos X1
- TP-Link Neffos X1 Max
- Ulefone Future
- UMI Max
- UMI Plus
- UMI Super
- Wolder WIAM #65
- ZTE Nubia N1
- Motorola Moto M
- Gionee A1
This list is incomplete; you can help by expanding it.
Facts about "Helio P10 (MT6755) - MediaTek"
base frequency | 2,000 MHz (2 GHz, 2,000,000 kHz) + and 1,200 MHz (1.2 GHz, 1,200,000 kHz) + |
bus type | AMBA 4 AXI + |
core count | 8 + |
core name | Cortex-A53 + |
core voltage | 1 V (10 dV, 100 cV, 1,000 mV) + |
designer | MediaTek + and ARM Holdings + |
family | Helio + |
first announced | June 1, 2015 + |
first launched | January 2016 + |
full page name | mediatek/helio/mt6755 + |
has 2g support | true + |
has 3g support | true + |
has 4g support | true + |
has csd support | true + |
has dc-hsdpa support | true + |
has e-utran support | true + |
has ecc memory support | false + |
has edge support | true + |
has gprs support | true + |
has gsm support | true + |
has hsupa support | true + |
has lte advanced support | true + |
has td-scdma support | true + |
has umts support | true + |
instance of | microprocessor + |
integrated gpu | Mali-T860 + |
integrated gpu base frequency | 700 MHz (0.7 GHz, 700,000 KHz) + |
integrated gpu designer | ARM Holdings + |
integrated gpu execution units | 2 + |
io voltage | 1.8 V (18 dV, 180 cV, 1,800 mV) +, 2.8 V (28 dV, 280 cV, 2,800 mV) + and 3.3 V (33 dV, 330 cV, 3,300 mV) + |
isa | ARMv8 + |
isa family | ARM + |
l1$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l1d$ description | 4-way set associative + |
l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1i$ description | 2-way set associative + |
l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
ldate | January 2016 + |
manufacturer | TSMC + |
market segment | Mobile + and Embedded + |
max cpu count | 1 + |
max junction temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
max memory bandwidth | 6.95 GiB/s (7,116.8 MiB/s, 7.463 GB/s, 7,462.506 MB/s, 0.00679 TiB/s, 0.00746 TB/s) + |
max memory channels | 1 + |
max operating temperature | 80 °C + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Cortex-A53 + |
min operating temperature | -20 °C + |
min storage temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | P10 + |
name | Helio P10 + |
part number | MT6755 + and MTK6755 + |
process | 28 nm (0.028 μm, 2.8e-5 mm) + |
series | Helio P + |
smp max ways | 1 + |
supported memory type | LPDDR3-1866 + |
technology | CMOS + |
thread count | 8 + |
used by | Alcatel Flash Plus 2 +, Archos Diamond 2 Plus +, Blackview BV6000 +, Blackview R7 +, BLU Pure XR +, BLU Vivo 6 +, Elephone M3 +, Elephone P9000 +, Gionee M6 Plus +, Gionee S8 +, HTC Desire 10 Pro +, HTC U Play +, HTC One A9s +, iMan Victor +, Lenovo K5 Note +, LG Stylus 3 +, Meizu M3E +, Meizu M3 Max +, Meizu M3 Note +, Meizu U20 +, Nomu S30 +, Nokia 5.1 +, Oppo F1 Plus +, Oppo R9 +, Sony Xperia XA +, Sony Xperia XA Ultra +, TCL Flash Plus 2 +, TP-Link Neffos X1 +, TP-Link Neffos X1 Max +, Ulefone Future +, UMI Max +, UMI Plus +, UMI Super +, Wolder WIAM #65 +, ZTE Nubia N1 +, Motorola Moto M + and Gionee A1 + |
user equipment category | 6 + |
word size | 64 bit (8 octets, 16 nibbles) + |