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Difference between revisions of "intel/xeon e3/e3-1505l v5"
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− | {{intel title|Xeon E3-1505L | + | {{intel title|Xeon E3-1505L v5}} |
− | {{ | + | {{chip |
− | | name | + | |name=Xeon E3-1505L v5 |
− | | no image | + | |no image=Yes |
− | | image | + | |image=skylake h (front).png |
− | + | |designer=Intel | |
− | + | |manufacturer=Intel | |
− | | designer | + | |model number=E3-1505L v5 |
− | | manufacturer | + | |part number=CL8066202399804 |
− | | model number | + | |s-spec=SR2E0 |
− | | part number | + | |market=Embedded |
− | | | + | |first announced=September 1, 2015 |
− | | market | + | |first launched=October 12, 2015 |
− | | first announced | + | |release price=$433.00 |
− | | first launched | + | |family=Xeon E3 |
− | | | + | |series=E3-1500 v5 |
− | + | |locked=Yes | |
− | + | |frequency=2,000 MHz | |
− | | family | + | |turbo frequency1=2,800 MHz |
− | | series | + | |turbo frequency2=2,700 MHz |
− | | locked | + | |turbo frequency3=2,600 MHz |
− | | frequency | + | |turbo frequency4=2,550 MHz |
− | + | |bus type=DMI 3.0 | |
− | | turbo frequency1 | + | |bus links=4 |
− | | turbo frequency2 | + | |bus rate=8 GT/s |
− | | turbo frequency3 | + | |clock multiplier=20 |
− | | turbo frequency4 | + | |isa=x86-64 |
− | | bus type | + | |isa family=x86 |
− | | bus | + | |microarch=Skylake |
− | | bus rate | + | |platform=Greenlow |
− | | clock multiplier | + | |core name=Skylake H |
− | | | + | |core family=6 |
− | + | |core model=94 | |
− | | | + | |core stepping=R0 |
− | + | |process=14 nm | |
− | + | |technology=CMOS | |
− | + | |die area=122 mm² | |
− | | microarch | + | |word size=64 bit |
− | | platform | + | |core count=4 |
− | + | |thread count=8 | |
− | | core name | + | |max cpus=1 |
− | | core family | + | |max memory=64 GiB |
− | | core model | + | |v core min=0.55 V |
− | | core stepping | + | |v core max=1.52 V |
− | | process | + | |tdp=25 W |
− | + | |temp min=0 °C | |
− | | technology | + | |temp max=100 °C |
− | | die | + | |tjunc min=0 °C |
− | | word size | + | |tjunc max=100 °C |
− | | core count | + | |tstorage min=-25 °C |
− | | thread count | + | |tstorage max=125 °C |
− | | max cpus | + | |package module 1={{packages/intel/fcbga-1440}} |
− | | max memory | ||
− | |||
− | |||
− | | v core | ||
− | | v core | ||
− | |||
− | | tdp | ||
− | | | ||
− | |||
− | |||
− | |||
− | | temp max | ||
− | | | ||
− | |||
− | | | ||
− | | | ||
− | | | ||
− | | package | ||
− | |||
− | |||
}} | }} | ||
− | + | '''Xeon E3-1505L v5''' is a {{arch|64}} [[quad-core]] [[x86]] high-end performance mobile workstation [[microprocessor]] introduced by [[Intel]] in late 2015. The E3-1505L v5, which is based on the {{intel|Skylake|l=arch}} microarchitecture and is fabricated on a [[14 nm process]], has a base frequency of 2 GHz and a {{intel|turbo boost}} frequency of up to 2.8 GHz with a TDP of 25 W. This processor incorporates the {{intel|HD Graphics P530}} [[integrated graphics]] operating at 350 MHz with a turbo frequency of 1 GHz. This model supports 64 GiB of dual-channel DDR4-2133 ECC memory. | |
== Cache == | == Cache == | ||
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}} | {{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}} | ||
− | {{cache | + | {{cache size |
+ | |l1 cache=256 KiB | ||
|l1i cache=128 KiB | |l1i cache=128 KiB | ||
|l1i break=4x32 KiB | |l1i break=4x32 KiB | ||
|l1i desc=8-way set associative | |l1i desc=8-way set associative | ||
− | |||
|l1d cache=128 KiB | |l1d cache=128 KiB | ||
|l1d break=4x32 KiB | |l1d break=4x32 KiB | ||
|l1d desc=8-way set associative | |l1d desc=8-way set associative | ||
− | |l1d | + | |l1d policy=write-back |
|l2 cache=1 MiB | |l2 cache=1 MiB | ||
|l2 break=4x256 KiB | |l2 break=4x256 KiB | ||
|l2 desc=4-way set associative | |l2 desc=4-way set associative | ||
− | |l2 | + | |l2 policy=write-back |
|l3 cache=8 MiB | |l3 cache=8 MiB | ||
|l3 break=4x2 MiB | |l3 break=4x2 MiB | ||
+ | |l3 policy=write-back | ||
+ | }} | ||
+ | |||
+ | == Memory controller == | ||
+ | {{memory controller | ||
+ | |type=LPDDR3-1866 | ||
+ | |type 2=DDR3L-1600 | ||
+ | |type 3=DDR4-2133 | ||
+ | |ecc=Yes | ||
+ | |max mem=64 GiB | ||
+ | |controllers=1 | ||
+ | |channels=2 | ||
+ | |max bandwidth=31.79 GiB/s | ||
+ | |bandwidth schan=15.89 GiB/s | ||
+ | |bandwidth dchan=31.79 GiB/s | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions | ||
+ | | pcie revision = 3.0 | ||
+ | | pcie lanes = 16 | ||
+ | | pcie config = 1x16 | ||
+ | | pcie config 2 = 2x8 | ||
+ | | pcie config 3 = 1x8+2x4 | ||
}} | }} | ||
== Graphics == | == Graphics == | ||
− | {{integrated | + | {{integrated graphics |
− | | gpu = | + | | gpu = HD Graphics P530 |
| device id = 0x191D | | device id = 0x191D | ||
+ | | designer = Intel | ||
| execution units = 24 | | execution units = 24 | ||
− | | displays | + | | max displays = 3 |
+ | | max memory = 1.7 GiB | ||
| frequency = 350 MHz | | frequency = 350 MHz | ||
− | | max frequency = 1 | + | | max frequency = 1,000 MHz |
− | |||
| output crt = | | output crt = | ||
Line 112: | Line 117: | ||
| output dvi = Yes | | output dvi = Yes | ||
− | | directx ver | + | | directx ver = 12 |
− | | opengl ver | + | | opengl ver = 4.4 |
− | | opencl ver | + | | opencl ver = 2.0 |
− | | | + | | hdmi ver = 1.4a |
− | | | + | | dp ver = 1.2 |
− | | | + | | edp ver = 1.3 |
− | | | + | | max res hdmi = 4096x2304 |
− | | | + | | max res hdmi freq = 24 Hz |
− | | dp | + | | max res dp = 4096x2304 |
− | | edp | + | | max res dp freq = 60 Hz |
+ | | max res edp = 4096x2304 | ||
+ | | max res edp freq = 60 Hz | ||
+ | | max res vga = | ||
+ | | max res vga freq = | ||
− | | | + | | features = Yes |
− | + | | intel quick sync = Yes | |
− | + | | intel intru 3d = Yes | |
− | + | | intel insider = | |
− | + | | intel widi = | |
− | + | | intel fdi = | |
− | + | | intel clear video = Yes | |
− | + | | intel clear video hd = Yes | |
− | |||
− | |||
− | |||
− | |||
− | |||
− | | intel quick sync | ||
− | | intel intru 3d | ||
− | | intel insider | ||
− | | intel widi | ||
− | | intel fdi | ||
− | | intel clear video | ||
}} | }} | ||
+ | {{skylake hardware accelerated video table|col=1}} | ||
− | == | + | == Features == |
− | {{ | + | {{x86 features |
− | | | + | |real=Yes |
− | | | + | |protected=Yes |
− | | | + | |smm=Yes |
− | | | + | |fpu=Yes |
− | | | + | |x8616=Yes |
− | | | + | |x8632=Yes |
− | | | + | |x8664=Yes |
− | | | + | |nx=Yes |
− | | | + | |mmx=Yes |
− | | | + | |emmx=Yes |
− | | | + | |sse=Yes |
− | + | |sse2=Yes | |
− | + | |sse3=Yes | |
− | + | |ssse3=Yes | |
− | + | |sse41=Yes | |
− | | | + | |sse42=Yes |
− | | | + | |sse4a=No |
− | | | + | |avx=Yes |
− | | | + | |avx2=Yes |
− | | | ||
− | | | ||
− | | | ||
− | | | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | == | + | |abm=Yes |
− | + | |tbm=No | |
− | | | + | |bmi1=Yes |
− | | | + | |bmi2=Yes |
− | | | + | |fma3=Yes |
− | | | + | |fma4=No |
− | | | + | |aes=Yes |
− | | | + | |rdrand=Yes |
− | | tbt1 | + | |sha=No |
− | | tbt2 | + | |xop=No |
− | | bpt | + | |adx=Yes |
− | | | + | |clmul=Yes |
− | | | + | |f16c=Yes |
− | | | + | |tbt1=No |
− | | | + | |tbt2=Yes |
− | | | + | |tbmt3=No |
− | | | + | |bpt=No |
− | | | + | |eist=Yes |
− | | | + | |sst=No |
− | | | + | |flex=No |
− | | | + | |fastmem=No |
− | | | + | |isrt=No |
− | | | + | |sba=No |
− | | | + | |mwt=No |
− | | | + | |sipp=No |
− | | | + | |att=No |
− | | | + | |ipt=No |
− | | | + | |tsx=Yes |
− | | | + | |txt=Yes |
− | | | + | |ht=Yes |
− | | | + | |vpro=Yes |
− | | | + | |vtx=Yes |
− | | | + | |vtd=Yes |
− | | | + | |ept=Yes |
− | | | + | |mpx=Yes |
− | | | + | |sgx=Yes |
+ | |securekey=Yes | ||
+ | |osguard=Yes | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
}} | }} |
Latest revision as of 15:27, 13 December 2017
Edit Values | |||||||||||||
Xeon E3-1505L v5 | |||||||||||||
General Info | |||||||||||||
Designer | Intel | ||||||||||||
Manufacturer | Intel | ||||||||||||
Model Number | E3-1505L v5 | ||||||||||||
Part Number | CL8066202399804 | ||||||||||||
S-Spec | SR2E0 | ||||||||||||
Market | Embedded | ||||||||||||
Introduction | September 1, 2015 (announced) October 12, 2015 (launched) | ||||||||||||
Release Price | $433.00 | ||||||||||||
Shop | Amazon | ||||||||||||
General Specs | |||||||||||||
Family | Xeon E3 | ||||||||||||
Series | E3-1500 v5 | ||||||||||||
Locked | Yes | ||||||||||||
Frequency | 2,000 MHz | ||||||||||||
Turbo Frequency | 2,800 MHz (1 core), 2,700 MHz (2 cores), 2,600 MHz (3 cores), 2,550 MHz (4 cores) | ||||||||||||
Bus type | DMI 3.0 | ||||||||||||
Bus rate | 4 × 8 GT/s | ||||||||||||
Clock multiplier | 20 | ||||||||||||
Microarchitecture | |||||||||||||
ISA | x86-64 (x86) | ||||||||||||
Microarchitecture | Skylake | ||||||||||||
Platform | Greenlow | ||||||||||||
Core Name | Skylake H | ||||||||||||
Core Family | 6 | ||||||||||||
Core Model | 94 | ||||||||||||
Core Stepping | R0 | ||||||||||||
Process | 14 nm | ||||||||||||
Technology | CMOS | ||||||||||||
Die | 122 mm² | ||||||||||||
Word Size | 64 bit | ||||||||||||
Cores | 4 | ||||||||||||
Threads | 8 | ||||||||||||
Max Memory | 64 GiB | ||||||||||||
Multiprocessing | |||||||||||||
Max SMP | 1-Way (Uniprocessor) | ||||||||||||
Electrical | |||||||||||||
Vcore | 0.55 V-1.52 V | ||||||||||||
TDP | 25 W | ||||||||||||
OP Temperature | 0 °C – 100 °C | ||||||||||||
Tjunction | 0 °C – 100 °C | ||||||||||||
Tstorage | -25 °C – 125 °C | ||||||||||||
Packaging | |||||||||||||
|
Xeon E3-1505L v5 is a 64-bit quad-core x86 high-end performance mobile workstation microprocessor introduced by Intel in late 2015. The E3-1505L v5, which is based on the Skylake microarchitecture and is fabricated on a 14 nm process, has a base frequency of 2 GHz and a turbo boost frequency of up to 2.8 GHz with a TDP of 25 W. This processor incorporates the HD Graphics P530 integrated graphics operating at 350 MHz with a turbo frequency of 1 GHz. This model supports 64 GiB of dual-channel DDR4-2133 ECC memory.
Cache[edit]
- Main article: Skylake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options
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Graphics[edit]
Integrated Graphics Information
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[Edit] Skylake (Gen9) Hardware Accelerated Video Capabilities | |||||||
---|---|---|---|---|---|---|---|
Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, SHP, MHP | 5.1 | 2160p (4K) | |
JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
HEVC (H.265) | Main | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High | 3840x3840 | |||
VP8 | Unified | Unified | - | 0 | Unified | 1080p | |
VP9 | ✘ | 0 | Unified | 2160p (4K) |
Features[edit]
[Edit/Modify Supported Features]
Facts about "Xeon E3-1505L v5 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon E3-1505L v5 - Intel#package + and Xeon E3-1505L v5 - Intel#io + |
base frequency | 2,000 MHz (2 GHz, 2,000,000 kHz) + |
bus links | 4 + |
bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
bus type | DMI 3.0 + |
clock multiplier | 20 + |
core count | 4 + |
core family | 6 + |
core model | 94 + |
core name | Skylake H + |
core stepping | R0 + |
core voltage (max) | 1.52 V (15.2 dV, 152 cV, 1,520 mV) + |
core voltage (min) | 0.55 V (5.5 dV, 55 cV, 550 mV) + |
designer | Intel + |
device id | 0x191D + |
die area | 122 mm² (0.189 in², 1.22 cm², 122,000,000 µm²) + |
family | Xeon E3 + |
first announced | September 1, 2015 + |
first launched | October 12, 2015 + |
full page name | intel/xeon e3/e3-1505l v5 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology + and OS Guard + |
has intel enhanced speedstep technology | true + |
has intel secure key technology | true + |
has intel supervisor mode execution protection | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
integrated gpu | HD Graphics P530 + |
integrated gpu base frequency | 350 MHz (0.35 GHz, 350,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 24 + |
integrated gpu max frequency | 1,000 MHz (1 GHz, 1,000,000 KHz) + |
integrated gpu max memory | 1,740.8 MiB (1,782,579.2 KiB, 1,825,361,100.8 B, 1.7 GiB) + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
l3$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
ldate | October 12, 2015 + |
main image | + |
manufacturer | Intel + |
market segment | Embedded + |
max cpu count | 1 + |
max junction temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) + |
max memory bandwidth | 31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
max memory channels | 2 + |
max operating temperature | 100 °C + |
max pcie lanes | 16 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Skylake + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min operating temperature | 0 °C + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | E3-1505L v5 + |
name | Xeon E3-1505L v5 + |
package | FCBGA-1440 + |
part number | CL8066202399804 + |
platform | Greenlow + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 433.00 (€ 389.70, £ 350.73, ¥ 44,741.89) + |
s-spec | SR2E0 + |
series | E3-1500 v5 + |
smp max ways | 1 + |
supported memory type | LPDDR3-1866 +, DDR3L-1600 + and DDR4-2133 + |
tdp | 25 W (25,000 mW, 0.0335 hp, 0.025 kW) + |
technology | CMOS + |
thread count | 8 + |
turbo frequency (1 core) | 2,800 MHz (2.8 GHz, 2,800,000 kHz) + |
turbo frequency (2 cores) | 2,700 MHz (2.7 GHz, 2,700,000 kHz) + |
turbo frequency (3 cores) | 2,600 MHz (2.6 GHz, 2,600,000 kHz) + |
turbo frequency (4 cores) | 2,550 MHz (2.55 GHz, 2,550,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |
x86/has memory protection extensions | true + |
x86/has software guard extensions | true + |