Semiconductor & Computer Engineering
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Difference between revisions of "amd/am186/mr80186-6"
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| name = MR80186-6 | | name = MR80186-6 | ||
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| model number = MR80186-6 | | model number = MR80186-6 | ||
| part number = MR80186-6 | | part number = MR80186-6 | ||
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| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
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| market = Embedded | | market = Embedded | ||
| first announced = 1984 | | first announced = 1984 | ||
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| max memory addr = | | max memory addr = | ||
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| power = 3 W | | power = 3 W | ||
| v core = 5 V | | v core = 5 V | ||
Latest revision as of 14:17, 13 December 2017
| Edit Values | |
| MR80186-6 | |
| General Info | |
| Designer | Intel |
| Manufacturer | AMD |
| Model Number | MR80186-6 |
| Part Number | MR80186-6 |
| Market | Embedded |
| Introduction | 1984 (announced) 1984 (launched) |
| Shop | Amazon |
| General Specs | |
| Family | Am186 |
| Series | Am186 |
| Frequency | 6 MHz |
| Bus speed | 1.5 MHz |
| Bus rate | 1.5 MT/s |
| Microarchitecture | |
| Microarchitecture | 80186 |
| Core Name | 80186 |
| Process | 1.5 µm |
| Transistors | 55,000 |
| Technology | nMOS |
| Word Size | 16 bit |
| Cores | 1 |
| Max Memory | 1 MiB |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| Power dissipation | 3 W |
| Vcore | 5 V ± 5 % |
| Tcase | -55 °C – 125 °C |
| Tstorage | -65 °C – 150 °C |
MR80186-6 was a 16-bit 80186-based microprocessor designed by Intel and manufactured by AMD. This model, which operated at 6 MHz, supported military temperature range and was otherwise identical to the standard models.
Contents
Cache[edit]
- Main article: 80186 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 0 KiB 0 B 0 MiB |
1x0 KiB |
| L2$ | 0 KiB 0 MiB 0 B 0 GiB |
1x0 KiB |
Graphics[edit]
This chip had no integrated graphics processing unit.
Features[edit]
- Military temperature range
- 10 new instructions
- Two DMA channels
- Three programmable interrupt timers
- Local Bus Controller
- Object code-compatible with all 86/88 software
Documents[edit]
- AMD 80186 (1985), Publication #03551 Rev C