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Difference between revisions of "amd/k6-2/k6-2-500ahx"
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{{amd title|K6-2/500AHX}} | {{amd title|K6-2/500AHX}} | ||
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| name = K6-2/500AHX | | name = K6-2/500AHX | ||
| no image = No | | no image = No | ||
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| model number = K6-2/500AHX | | model number = K6-2/500AHX | ||
| part number = AMD-K6-2/500AHX | | part number = AMD-K6-2/500AHX | ||
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| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
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| market = Desktop | | market = Desktop | ||
| first announced = February 26, 1999 | | first announced = February 26, 1999 | ||
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| max memory = 4 GiB | | max memory = 4 GiB | ||
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| power = 31.3 W | | power = 31.3 W | ||
| v core = 2.4 V | | v core = 2.4 V | ||
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== Features == | == Features == | ||
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| mmx = true | | mmx = true | ||
| 3dnow = true | | 3dnow = true |
Latest revision as of 16:08, 13 December 2017
Edit Values | |
K6-2/500AHX | |
General Info | |
Designer | AMD |
Manufacturer | AMD |
Model Number | K6-2/500AHX |
Part Number | AMD-K6-2/500AHX |
Market | Desktop |
Introduction | February 26, 1999 (announced) March 11, 1999 (launched) |
Shop | Amazon |
General Specs | |
Family | K6-2 |
Series | K6-2 Desktop |
Frequency | 499.99 MHz |
Bus type | FSB |
Bus speed | 99.99 MHz |
Bus rate | 99.99 MT/s |
Clock multiplier | 5 |
CPUID | 58C |
Microarchitecture | |
Microarchitecture | K6-2 |
Platform | Super 7 |
Core Name | Chomper Extended |
Core Family | 5 |
Core Model | 8 |
Core Stepping | 12 |
Process | 0.25 µm |
Transistors | 9,300,000 |
Technology | CMOS |
Die | 81 mm² |
Word Size | 32 bit |
Cores | 1 |
Threads | 1 |
Max Memory | 4 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Power dissipation | 31.3 W |
Vcore | 2.4 V ± 0.1 V |
VI/O | 3.3675 V ± 7% |
Tcase | 0 °C – 65 °C |
Tstorage | -65 °C – 150 °C |
K6-2/500AHX was a 32-bit x86 K6-2-based microprocessor designed and manufactured in 1999 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 500 MHz with a FSB of 100 MHz consumed 31.3 W.
Contents
Cache[edit]
- Main article: K6-2 § Cache
L2$ can be 512 KiB to 2 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.
Cache Info [Edit Values] | ||
L1I$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
L1D$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
Graphics[edit]
This SoC has no integrated graphics processing unit.
Features[edit]
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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- Auto-power down state
- Stop clock state
Documents[edit]
DataSheet[edit]
- AMD-K6-2 Processor Data Sheet; Publication #21850 Revision J/0, February 2000
Facts about "K6-2/500AHX - AMD"
l1d$ description | 2-way set associative + |
l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l1i$ description | 2-way set associative + |
l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |