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Difference between revisions of "compaq/microarchitectures/alpha 21364"
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| − | {{compaq title|Alpha | + | {{compaq title|Alpha 21364|arch}} |
{{microarchitecture | {{microarchitecture | ||
|atype=CPU | |atype=CPU | ||
| Line 5: | Line 5: | ||
|designer=DEC | |designer=DEC | ||
|designer 2=Compaq | |designer 2=Compaq | ||
| − | |manufacturer= | + | |manufacturer=IBM |
|introduction=January 20, 2002 | |introduction=January 20, 2002 | ||
|process=0.18 µm | |process=0.18 µm | ||
| Line 13: | Line 13: | ||
|speculative=Yes | |speculative=Yes | ||
|renaming=Yes | |renaming=Yes | ||
| − | |stages= | + | |stages=7 |
|decode=4-way | |decode=4-way | ||
|isa=Alpha | |isa=Alpha | ||
| Line 22: | Line 22: | ||
|l1d per=core | |l1d per=core | ||
|l1d desc=2-way set associative | |l1d desc=2-way set associative | ||
| + | |l2=1.75 MiB | ||
| + | |l2 per=core | ||
| + | |l2 desc=7-way set associative | ||
|predecessor=Alpha 21264 | |predecessor=Alpha 21264 | ||
|predecessor link=dec/microarchitectures/alpha_21264 | |predecessor link=dec/microarchitectures/alpha_21264 | ||
| Line 27: | Line 30: | ||
|successor link=compaq/microarchitectures/alpha_21464 | |successor link=compaq/microarchitectures/alpha_21464 | ||
}} | }} | ||
| + | '''Alpha 21364''' was an [[Alpha]] microarchitecture designed by [[Compaq]] after acquiring it from [[DEC]] and introduced in 2002 as a successor to the {{\\|Alpha 21264}} architecture. | ||
| + | |||
| + | == History == | ||
| + | {{empty section}} | ||
| + | |||
| + | == Process Technology == | ||
| + | {{see also|0.18 µm process}} | ||
| + | {{empty section}} | ||
| + | |||
| + | == Architecture == | ||
| + | {{empty section}} | ||
| + | |||
| + | == Die == | ||
| + | * 1,250 MHz | ||
| + | * 135 Watts (155 W peak) @ 1.65 volts | ||
| + | * [[0.18 µm process]] | ||
| + | * 7 metal layers (copper interconnect) | ||
| + | * 152,000,000 transistors | ||
| + | ** 15,000,000 logic | ||
| + | ** 137,000,000 cache | ||
| + | * 21.1 mm x 18.8 mm | ||
| + | * 396.68 mm² die size | ||
| + | * PGA-1443 package | ||
| + | ** 946 signal pins | ||
| + | |||
| + | |||
| + | : [[File:alpha 21364 die shot.png|650px]] | ||
| + | |||
| + | |||
| + | : [[File:alpha 21364 die shot (annotated).png|650px]] | ||
| + | |||
| + | === Core === | ||
| + | <div style="display: inline-block"> | ||
| + | <div style="float: left; margin: 10px;">[[File:alpha 21364 core.png|350px]]</div> | ||
| + | <div style="float: left; margin: 10px;">[[File:alpha 21364 core (annotated).png|350px]]</div></div> | ||
| + | |||
| + | {{clear}} | ||
| + | |||
| + | == Documents == | ||
| + | * [[:File:Alpha 21364 (EV7) (January 4, 2002).pdf|Alpha 21364 (EV7)]], January 4, 2002 | ||
| + | * [[:File:ev7SMP.ppt|Alpha 21364: A Scalable Single-chip SMP (PPT)]] ([[:File:ev7SMP.pdf|PDF Version]]), 1998 | ||
| + | * [[:File:alpha 21464.ppt|The Alpha 21364 and 21464 Microprocessors: Continuing the Performance Lead Beyond Y2K (PPT)]] ([[:File:alpha 21464.pdf|PDF Version]]) | ||
| + | |||
| + | == References == | ||
| + | * "Alpha 21364 (EV7)", Compaq presentation | ||
| + | * Tsuk, M., et al. "Modeling and measurement of the Alpha 21364 package." Electrical Performance of Electronic Packaging, 2001. IEEE, 2001. | ||
Latest revision as of 19:41, 14 June 2017
| Edit Values | |
| Alpha 21364 µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | DEC, Compaq |
| Manufacturer | IBM |
| Introduction | January 20, 2002 |
| Process | 0.18 µm |
| Core Configs | 1 |
| Pipeline | |
| Type | Superscalar |
| OoOE | Yes |
| Speculative | Yes |
| Reg Renaming | Yes |
| Stages | 7 |
| Decode | 4-way |
| Instructions | |
| ISA | Alpha |
| Cache | |
| L1I Cache | 64 KiB/core 2-way set associative |
| L1D Cache | 64 KiB/core 2-way set associative |
| L2 Cache | 1.75 MiB/core 7-way set associative |
| Succession | |
Alpha 21364 was an Alpha microarchitecture designed by Compaq after acquiring it from DEC and introduced in 2002 as a successor to the Alpha 21264 architecture.
History[edit]
 |
This section is empty; you can help add the missing info by editing this page. |
Process Technology[edit]
- See also: 0.18 µm process
| |
This section is empty; you can help add the missing info by editing this page. |
Architecture[edit]
| |
This section is empty; you can help add the missing info by editing this page. |
Die[edit]
- 1,250 MHz
- 135 Watts (155 W peak) @ 1.65 volts
- 0.18 µm process
- 7 metal layers (copper interconnect)
- 152,000,000 transistors
- 15,000,000 logic
- 137,000,000 cache
- 21.1 mm x 18.8 mm
- 396.68 mm² die size
- PGA-1443 package
- 946 signal pins
.png)
Core[edit]
.png)
Documents[edit]
- Alpha 21364 (EV7), January 4, 2002
- Alpha 21364: A Scalable Single-chip SMP (PPT) (PDF Version), 1998
- The Alpha 21364 and 21464 Microprocessors: Continuing the Performance Lead Beyond Y2K (PPT) (PDF Version)
References[edit]
- "Alpha 21364 (EV7)", Compaq presentation
- Tsuk, M., et al. "Modeling and measurement of the Alpha 21364 package." Electrical Performance of Electronic Packaging, 2001. IEEE, 2001.
Facts about "Alpha 21364 - Microarchitectures - Compaq"
| codename | Alpha 21364 + |
| core count | 1 + |
| designer | DEC + and Compaq + |
| first launched | January 20, 2002 + |
| full page name | compaq/microarchitectures/alpha 21364 + |
| instance of | microarchitecture + |
| instruction set architecture | Alpha + |
| manufacturer | IBM + |
| microarchitecture type | CPU + |
| name | Alpha 21364 + |
| pipeline stages | 7 + |
| process | 180 nm (0.18 μm, 1.8e-4 mm) + |