From WikiChip
Difference between revisions of "intel/core i3/i3-7100"
(7 intermediate revisions by 4 users not shown) | |||
Line 1: | Line 1: | ||
{{intel title|Core i3-7100}} | {{intel title|Core i3-7100}} | ||
− | {{ | + | {{chip |
| name = Core i3-7100 | | name = Core i3-7100 | ||
| no image = Yes | | no image = Yes | ||
Line 10: | Line 10: | ||
| model number = i3-7100 | | model number = i3-7100 | ||
| part number = BX80677I37100 | | part number = BX80677I37100 | ||
− | | part number | + | | part number 2 = BXC80677I37100 |
− | | s-spec = | + | | s-spec = SR35C |
| s-spec 2 = | | s-spec 2 = | ||
| market = Desktop | | market = Desktop | ||
Line 53: | Line 53: | ||
| max memory = 64 GiB | | max memory = 64 GiB | ||
− | + | ||
| v core min = 0.55 V | | v core min = 0.55 V | ||
| v core max = 1.52 V | | v core max = 1.52 V | ||
Line 96: | Line 96: | ||
|type=DDR3L-1600 | |type=DDR3L-1600 | ||
|type 2=DDR4-2400 | |type 2=DDR4-2400 | ||
− | |ecc= | + | |ecc=Yes |
|max mem=64 GiB | |max mem=64 GiB | ||
|controllers=1 | |controllers=1 | ||
Line 183: | Line 183: | ||
|avx=Yes | |avx=Yes | ||
|avx2=Yes | |avx2=Yes | ||
− | + | ||
|abm=Yes | |abm=Yes | ||
|tbm=No | |tbm=No |
Latest revision as of 05:02, 27 October 2018
Edit Values | ||||||||||||
Core i3-7100 | ||||||||||||
General Info | ||||||||||||
Designer | Intel | |||||||||||
Manufacturer | Intel | |||||||||||
Model Number | i3-7100 | |||||||||||
Part Number | BX80677I37100, BXC80677I37100 | |||||||||||
S-Spec | SR35C | |||||||||||
Market | Desktop | |||||||||||
Introduction | January 3, 2017 (announced) January 3, 2017 (launched) | |||||||||||
Release Price | $117.00 | |||||||||||
Shop | Amazon | |||||||||||
General Specs | ||||||||||||
Family | Core i3 | |||||||||||
Series | i3-7100 | |||||||||||
Locked | Yes | |||||||||||
Frequency | 3,900 MHz | |||||||||||
Bus type | DMI 3.0 | |||||||||||
Bus rate | 8 GT/s | |||||||||||
Clock multiplier | 39 | |||||||||||
Microarchitecture | ||||||||||||
ISA | x86-64 (x86) | |||||||||||
Microarchitecture | Kaby Lake | |||||||||||
Platform | Kaby Lake | |||||||||||
Chipset | Sunrise Point, Union Point | |||||||||||
Core Name | Kaby Lake S | |||||||||||
Core Family | 6 | |||||||||||
Core Model | 158 | |||||||||||
Core Stepping | S0 | |||||||||||
Process | 14 nm | |||||||||||
Technology | CMOS | |||||||||||
Word Size | 64 bit | |||||||||||
Cores | 2 | |||||||||||
Threads | 4 | |||||||||||
Max Memory | 64 GiB | |||||||||||
Multiprocessing | ||||||||||||
Max SMP | 1-Way (Uniprocessor) | |||||||||||
Electrical | ||||||||||||
Vcore | 0.55 V-1.52 V | |||||||||||
TDP | 51 W | |||||||||||
Tjunction | 0 °C – 100 °C | |||||||||||
Tstorage | -25 °C – 125 °C | |||||||||||
Packaging | ||||||||||||
|
Core i3-7100 is a 64-bit dual-core low-end performance x86 desktop microprocessor introduced by Intel in early 2017. This chip, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's improved 14 nm+ process. This processor, which has a base frequency of 3.9 GHz with a TDP of 51 Watts, supports up to 64 GiB of dual-channel DDR4-2400. The i3-7100 incorporates Intel's HD Graphics 630 IGP operating at 350 MHz with burst frequency of 1.1 GHz.
Cache[edit]
- Main article: Kaby Lake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
|||||||||||||||||||||||||||||||||||||
|
Memory controller[edit]
Integrated Memory Controller
|
||||||||||||||
|
Expansions[edit]
Expansion Options
|
||||||||
|
Graphics[edit]
Integrated Graphics Information
|
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
[Edit] Kaby Lake (Gen9.5) Hardware Accelerated Video Capabilities | |||||||
---|---|---|---|---|---|---|---|
Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, MVC, Stereo | 5.1 | 2160p (4K) | |
JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
HEVC (H.265) | Main, Main 10 | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High, Simple | 3840x3840 | |||
VP8 | Unified | Unified | N/A | 0 | Unified | 1080p | |
VP9 | 0 | 2160p (4K) | 0, 2 | Unified | 2160p (4K) |
Features[edit]
[Edit/Modify Supported Features]
Die Shot[edit]
- See also: Kaby Lake § Die Shot
A die shot of Intel's Kaby Lake dual-core desktop processors:
Facts about "Core i3-7100 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i3-7100 - Intel#io + |
device id | 0x5912 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | false + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Enhanced SpeedStep Technology +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard + and Identity Protection Technology + |
has intel enhanced speedstep technology | true + |
has intel identity protection technology support | true + |
has intel secure key technology | true + |
has intel supervisor mode execution protection | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
integrated gpu | HD Graphics 630 + |
integrated gpu base frequency | 350 MHz (0.35 GHz, 350,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 24 + |
integrated gpu max frequency | 1,100 MHz (1.1 GHz, 1,100,000 KHz) + |
integrated gpu max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) + |
max memory bandwidth | 35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 16 + |
supported memory type | DDR3L-1600 + and DDR4-2400 + |
x86/has memory protection extensions | true + |
x86/has software guard extensions | true + |