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Difference between revisions of "intel/core m/m3-7y30"
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{{intel title|Core M3-7Y30}} | {{intel title|Core M3-7Y30}} | ||
− | {{ | + | {{chip |
− | | name | + | |name=Core M3-7Y30 |
− | | | + | |image=kaby lake y (front).png |
− | + | |image size=250px | |
− | | image size | + | |designer=Intel |
− | + | |manufacturer=Intel | |
− | | designer | + | |model number=M3-7Y30 |
− | | manufacturer | + | |part number=HE8067702739824 |
− | | model number | + | |s-spec=SR2ZY |
− | | part number | + | |s-spec 2=SR347 |
− | + | |market=Mobile | |
− | + | |first announced=August 30, 2016 | |
− | | s-spec | + | |first launched=August 30, 2016 |
− | | s-spec 2 | + | |release price=$281.00 |
− | | market | + | |family=Core M3 |
− | | first announced | + | |series=m3-7Y |
− | | first launched | + | |locked=Yes |
− | + | |frequency=1,000 MHz | |
− | + | |turbo frequency1=2,600 MHz | |
− | | release price | + | |turbo frequency=Yes |
− | + | |bus type=OPI | |
− | | family | + | |bus rate=4 GT/s |
− | | series | + | |clock multiplier=10 |
− | | locked | + | |isa=x86-64 |
− | | frequency | + | |isa family=x86 |
− | + | |microarch=Kaby Lake | |
− | | turbo frequency1 | + | |platform=Kaby Lake |
− | | turbo | + | |core name=Kaby Lake Y |
− | + | |core family=6 | |
− | + | |core model=142 | |
− | | bus type | + | |core stepping=H0 |
− | + | |process=14 nm | |
− | | bus rate | + | |technology=CMOS |
− | + | |word size=64 bit | |
− | | clock multiplier | + | |core count=2 |
− | + | |thread count=4 | |
− | + | |max cpus=1 | |
− | | isa | + | |max memory=16 GiB |
− | | isa | + | |v core min=0.55 V |
− | | microarch | + | |v core max=1.52 V |
− | | platform | + | |tdp=4.5 W |
− | + | |ctdp down=3.75 W | |
− | + | |ctdp down frequency=600 MHz | |
− | | core name | + | |ctdp up=7 W |
− | | core family | + | |ctdp up frequency=1,600 MHz |
− | | core model | + | |tjunc min=0 °C |
− | | core stepping | + | |tjunc max=100 °C |
− | + | |tstorage min=-25 °C | |
− | | process | + | |tstorage max=125 °C |
− | + | |package name 1=intel,fcbga_1515 | |
− | | technology | ||
− | |||
− | |||
− | |||
− | | word size | ||
− | | core count | ||
− | | thread count | ||
− | | max cpus | ||
− | | max memory | ||
− | |||
− | |||
− | | v core min | ||
− | | v core max | ||
− | |||
− | | tdp | ||
− | |||
− | | ctdp down | ||
− | | ctdp down frequency = 600 MHz | ||
− | | ctdp up | ||
− | | ctdp up frequency | ||
− | | tjunc min | ||
− | | tjunc max | ||
− | |||
− | |||
− | | tstorage min | ||
− | | tstorage max | ||
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− | | package | ||
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}} | }} | ||
− | '''Core M3-7Y30''' is a {{arch|64}} [[dual-core]] low-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in mid-[[2016]]. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm+ process]]. The M3-7Y30 operates at 1 GHz with a TDP of 4.5 W supporting a {{intel|Turbo Boost}} frequency of 2.6 GHz. The processor supports up to 16 GiB of dual-channel non-ECC LPDDR3-1866 memory and incorporates Intel's {{intel|HD Graphics 615}} [[IGP]] operating at 300 MHz with a burst frequency of 900 MHz. | + | '''Core M3-7Y30''' is a {{arch|64}} [[dual-core]] low-end performance ultra-low power [[x86]] mobile microprocessor introduced by [[Intel]] in mid-[[2016]]. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm+ process]]. The M3-7Y30 operates at 1 GHz with a TDP of 4.5 W supporting a {{intel|Turbo Boost}} frequency of 2.6 GHz. The processor supports up to 16 GiB of dual-channel non-ECC LPDDR3-1866 memory and incorporates Intel's {{intel|HD Graphics 615}} [[IGP]] operating at 300 MHz with a burst frequency of 900 MHz. |
+ | This specific model has a configurable TDP-down of 3.75 W with a frequency of 600 MHz and a configurable TDP-up of 7 W with a frequency of 1.6 GHz. | ||
== Cache == | == Cache == | ||
{{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}} | {{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}} | ||
Line 99: | Line 61: | ||
|l1i break=2x32 KiB | |l1i break=2x32 KiB | ||
|l1i desc=8-way set associative | |l1i desc=8-way set associative | ||
− | |||
|l1d cache=64 KiB | |l1d cache=64 KiB | ||
|l1d break=2x32 KiB | |l1d break=2x32 KiB | ||
Line 138: | Line 99: | ||
== Graphics == | == Graphics == | ||
− | {{integrated | + | {{integrated graphics |
− | | gpu = | + | | gpu = HD Graphics 615 |
| device id = 0x591E | | device id = 0x591E | ||
+ | | designer = Intel | ||
| execution units = 24 | | execution units = 24 | ||
− | | displays | + | | max displays = 3 |
+ | | max memory = 16 GiB | ||
| frequency = 300 MHz | | frequency = 300 MHz | ||
| max frequency = 900 MHz | | max frequency = 900 MHz | ||
− | |||
| output crt = | | output crt = | ||
Line 156: | Line 118: | ||
| output dvi = Yes | | output dvi = Yes | ||
− | | directx ver | + | | directx ver = 12 |
− | | opengl ver | + | | opengl ver = 4.4 |
− | | opencl ver | + | | opencl ver = 2.0 |
− | | | + | | hdmi ver = 1.4a |
− | | | + | | dp ver = 1.2 |
− | | | + | | edp ver = 1.4 |
− | | | + | | max res hdmi = 4096x2304 |
− | | | + | | max res hdmi freq = 24 Hz |
− | | dp | + | | max res dp = 4096x2304 |
− | | edp | + | | max res dp freq = 60 Hz |
+ | | max res edp = 4096x2304 | ||
+ | | max res edp freq = 60 Hz | ||
+ | | max res vga = | ||
+ | | max res vga freq = | ||
− | | | + | | features = Yes |
− | + | | intel quick sync = Yes | |
− | + | | intel intru 3d = Yes | |
− | + | | intel insider = | |
− | + | | intel widi = | |
− | + | | intel fdi = | |
− | + | | intel clear video = Yes | |
− | + | | intel clear video hd = Yes | |
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | | intel quick sync | ||
− | | intel intru 3d | ||
− | | intel insider | ||
− | | intel widi | ||
− | | intel fdi | ||
− | | intel clear video | ||
}} | }} | ||
+ | {{kaby lake hardware accelerated video table|col=1}} | ||
== Features == | == Features == | ||
− | {{ | + | {{x86 features |
− | | | + | |real=Yes |
− | | nx | + | |protected=Yes |
− | | | + | |smm=Yes |
− | | | + | |fpu=Yes |
− | | | + | |x8616=Yes |
− | | | + | |x8632=Yes |
− | | | + | |x8664=Yes |
− | | | + | |nx=Yes |
− | | | + | |3dnow=No |
− | | | + | |e3dnow=No |
− | | | + | |mmx=Yes |
− | | | + | |emmx=Yes |
− | | | + | |sse=Yes |
− | | | + | |sse2=Yes |
− | | | + | |sse3=Yes |
− | | | + | |ssse3=Yes |
− | | | + | |sse41=Yes |
− | | | + | |sse42=Yes |
− | | | + | |sse4a=Yes |
− | | | + | |avx=Yes |
− | | | + | |avx2=Yes |
− | | | + | |
− | | | + | |abm=Yes |
− | | | + | |tbm=No |
− | | | + | |bmi1=Yes |
− | | | + | |bmi2=Yes |
− | | | + | |fma3=Yes |
− | | | + | |fma4=No |
− | | | + | |aes=Yes |
− | | mpx | + | |rdrand=Yes |
− | | sgx | + | |sha=No |
− | | | + | |xop=No |
− | | | + | |adx=Yes |
− | | | + | |clmul=Yes |
− | | | + | |f16c=Yes |
+ | |tbt1=No | ||
+ | |tbt2=Yes | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=Yes | ||
+ | |sst=Yes | ||
+ | |flex=Yes | ||
+ | |fastmem=No | ||
+ | |isrt=Yes | ||
+ | |sba=No | ||
+ | |mwt=Yes | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=No | ||
+ | |txt=No | ||
+ | |ht=Yes | ||
+ | |vpro=No | ||
+ | |vtx=Yes | ||
+ | |vtd=Yes | ||
+ | |ept=Yes | ||
+ | |mpx=Yes | ||
+ | |sgx=Yes | ||
+ | |securekey=Yes | ||
+ | |osguard=Yes | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdv=No | ||
+ | |rvi=No | ||
}} | }} |
Latest revision as of 16:58, 28 August 2018
Edit Values | |
Core M3-7Y30 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | M3-7Y30 |
Part Number | HE8067702739824 |
S-Spec | SR2ZY, SR347 |
Market | Mobile |
Introduction | August 30, 2016 (announced) August 30, 2016 (launched) |
Release Price | $281.00 |
Shop | Amazon |
General Specs | |
Family | Core M3 |
Series | m3-7Y |
Locked | Yes |
Frequency | 1,000 MHz |
Turbo Frequency | Yes |
Turbo Frequency | 2,600 MHz (1 core) |
Bus type | OPI |
Bus rate | 4 GT/s |
Clock multiplier | 10 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Kaby Lake |
Platform | Kaby Lake |
Core Name | Kaby Lake Y |
Core Family | 6 |
Core Model | 142 |
Core Stepping | H0 |
Process | 14 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 2 |
Threads | 4 |
Max Memory | 16 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Vcore | 0.55 V-1.52 V |
TDP | 4.5 W |
cTDP down | 3.75 W |
cTDP down frequency | 600 MHz |
cTDP up | 7 W |
cTDP up frequency | 1,600 MHz |
Tjunction | 0 °C – 100 °C |
Tstorage | -25 °C – 125 °C |
Packaging | |
Package | FCBGA-1515 (BGA) |
Dimension | 20 mm × 16.5 mm × 0.5 mm |
Pitch | 0.4 mm |
Contacts | 1515 |
Core M3-7Y30 is a 64-bit dual-core low-end performance ultra-low power x86 mobile microprocessor introduced by Intel in mid-2016. This chip, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's 14nm+ process. The M3-7Y30 operates at 1 GHz with a TDP of 4.5 W supporting a Turbo Boost frequency of 2.6 GHz. The processor supports up to 16 GiB of dual-channel non-ECC LPDDR3-1866 memory and incorporates Intel's HD Graphics 615 IGP operating at 300 MHz with a burst frequency of 900 MHz.
This specific model has a configurable TDP-down of 3.75 W with a frequency of 600 MHz and a configurable TDP-up of 7 W with a frequency of 1.6 GHz.
Cache[edit]
- Main article: Kaby Lake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options
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Graphics[edit]
Integrated Graphics Information
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[Edit] Kaby Lake (Gen9.5) Hardware Accelerated Video Capabilities | |||||||
---|---|---|---|---|---|---|---|
Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, MVC, Stereo | 5.1 | 2160p (4K) | |
JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
HEVC (H.265) | Main, Main 10 | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High, Simple | 3840x3840 | |||
VP8 | Unified | Unified | N/A | 0 | Unified | 1080p | |
VP9 | 0 | 2160p (4K) | 0, 2 | Unified | 2160p (4K) |
Features[edit]
[Edit/Modify Supported Features]
Facts about "Core M3-7Y30 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core M3-7Y30 - Intel#io + |
device id | 0x591E + |
has ecc memory support | false + |
has feature | integrated gpu + |
integrated gpu | Intel HD Graphics 615 + |
integrated gpu base frequency | 300 MHz (0.3 GHz, 300,000 KHz) + |
integrated gpu max frequency | 900 MHz (0.9 GHz, 900,000 KHz) + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ description | 12-way set associative + |
l3$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
max memory bandwidth | 27.81 GiB/s (28,477.44 MiB/s, 29.861 GB/s, 29,860.76 MB/s, 0.0272 TiB/s, 0.0299 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 10 + |
supported memory type | DDR3L-1600 + and LPDDR3-1866 + |