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Difference between revisions of "intel/core i5/i5-7267u"
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{{intel title|Core i5-7267U}}
 
{{intel title|Core i5-7267U}}
−
{{mpu
+
{{chip
−
| name               = Core i5-7267U
+
|name=Core i5-7267U
−
| no image           = Yes
+
|no image=Yes
−
| image              =
+
|designer=Intel
−
| image size          =
+
|manufacturer=Intel
−
| caption            =
+
|model number=i5-7267U
−
| designer           = Intel
+
|s-spec=SR362
−
| manufacturer       = Intel
+
|market=Mobile
−
| model number       = i5-7267U
+
|first announced=January 3, 2017
−
| part number        =
+
|first launched=January 3, 2017
−
| part number 1      =
+
|release price=$304.00
−
| part number 2      =
+
|family=Core i5
−
| s-spec             =  
+
|series=i5-7200
−
| market             = Mobile
+
|locked=Yes
−
| first announced     = January 3, 2017
+
|frequency=3,100 MHz
−
| first launched     = January 3, 2017
+
|turbo frequency1=3,500 MHz
−
| last order          =
+
|bus type=OPI
−
| last shipment      =
+
|bus rate=4 GT/s
−
| release price       =  
+
|clock multiplier=31
−
 
+
|isa=x86-64
−
| family             = Core i5
+
|isa family=x86
−
| series             = i5-7200
+
|microarch=Kaby Lake
−
| locked             = Yes
+
|platform=Kaby Lake
−
| frequency           = 3,100 MHz
+
|core name=Kaby Lake U
−
| turbo frequency    = Yes
+
|core family=6
−
| turbo frequency1   = 3,500 MHz
+
|core model=142
−
| turbo frequency2    =
+
|core stepping=J1
−
| turbo frequency3    =
+
|process=14 nm
−
| turbo frequency4    =
+
|technology=CMOS
−
| bus type           = OPI
+
|word size=64 bit
−
| bus speed          =
+
|core count=2
−
| bus rate           = 4 GT/s
+
|thread count=4
−
| bus links          =
+
|max cpus=1
−
| clock multiplier   = 31
+
|max memory=32 GiB
−
| cpuid              =
+
|v core min=0.55 V
−
 
+
|v core max=1.52 V
−
| isa family          = x86
+
|tdp=28 W
−
| isa                 = x86-64
+
|ctdp down=23 W
−
| microarch           = Kaby Lake
+
|tjunc min=0 °C
−
| platform           = Kaby Lake
+
|tjunc max=100 °C
−
| chipset            = Sunrise Point
+
|tstorage min=-25 °C
−
| chipset 2          = Union Point
+
|tstorage max=125 °C
−
| core name           = Kaby Lake U
+
|package module 1={{packages/intel/fcbga-1356}}
−
| core family         = 6
 
−
| core model         = 142
 
−
| core stepping       =
 
−
| core stepping 2    =  
 
−
| process             = 14 nm
 
−
| transistors        =
 
−
| technology         = CMOS
 
−
| die area            =
 
−
| die width          =
 
−
| die length          =
 
−
| word size           = 64 bit
 
−
| core count         = 2
 
−
| thread count       = 4
 
−
| max cpus           = 1
 
−
| max memory         = 32 GiB
 
−
 
 
−
| electrical          = Yes
 
−
| v core min         = 0.55 V
 
−
| v core max         = 1.52 V
 
−
| sdp                =
 
−
| tdp                 = 28 W
 
−
| tdp typical        =
 
−
| ctdp down           = 23 W
 
−
| ctdp down frequency =
 
−
| ctdp up            =
 
−
| ctdp up frequency  =
 
−
| tjunc min           = 0 °C
 
−
| tjunc max           = 100 °C
 
−
| tcase min          =
 
−
| tcase max          =
 
−
| tstorage min       = -25 °C
 
−
| tstorage max       = 125 °C
 
−
| tambient min        =
 
−
| tambient max        =  
 
  
−
| packaging          = Yes
 
−
| package            = FCBGA-1356
 
−
| package type      = FCBGA
 
−
| package pitch      = 0.65 mm
 
−
| package size      = 42 mm x 24 mm
 
−
| socket            = BGA-1356
 
−
| socket type        = BGA
 
 
}}
 
}}
 
'''Core i5-7267U''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm+ process]]. The i5-7267U operates at 3.1 GHz with a TDP of 15 W supporting a {{intel|Turbo Boost}} frequency of 3.5 GHz. The processor supports up to 32 GiB of dual-channel non-ECC DDR4-2133 memory and incorporates Intel's {{intel|Iris Plus Graphics 650}} [[IGP]] operating at 300 MHz with a burst frequency of 1.05 GHz. This specific GPU also incorporates an additional 64 MiB of [[eDRAM]] L4$.
 
'''Core i5-7267U''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm+ process]]. The i5-7267U operates at 3.1 GHz with a TDP of 15 W supporting a {{intel|Turbo Boost}} frequency of 3.5 GHz. The processor supports up to 32 GiB of dual-channel non-ECC DDR4-2133 memory and incorporates Intel's {{intel|Iris Plus Graphics 650}} [[IGP]] operating at 300 MHz with a burst frequency of 1.05 GHz. This specific GPU also incorporates an additional 64 MiB of [[eDRAM]] L4$.
  
 +
This model has a configurable TDP-down of 23 W.
 
== Cache ==
 
== Cache ==
 
{{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}}
 
{{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}}
Line 95: Line 55:
 
|l1i break=2x32 KiB
 
|l1i break=2x32 KiB
 
|l1i desc=8-way set associative
 
|l1i desc=8-way set associative
−
|l1i policy=write-back
 
 
|l1d cache=64 KiB
 
|l1d cache=64 KiB
 
|l1d break=2x32 KiB
 
|l1d break=2x32 KiB
Line 108: Line 67:
 
|l3 desc=12-way set associative
 
|l3 desc=12-way set associative
 
|l3 policy=write-back
 
|l3 policy=write-back
 +
|l4 cache=64 MiB
 
}}
 
}}
  
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| hdmi ver          = 1.4a
 
| hdmi ver          = 1.4a
 
| dp ver            = 1.2
 
| dp ver            = 1.2
−
| edp ver            = 1.3
+
| edp ver            = 1.4
 
| max res hdmi      = 4096x2304
 
| max res hdmi      = 4096x2304
 
| max res hdmi freq  = 30 Hz
 
| max res hdmi freq  = 30 Hz
Line 178: Line 138:
 
| intel clear video    = Yes
 
| intel clear video    = Yes
 
| intel clear video hd = Yes
 
| intel clear video hd = Yes
 +
}}
 +
{{kaby lake hardware accelerated video table|col=1}}
 +
 +
== Features ==
 +
{{x86 features
 +
|real=Yes
 +
|protected=Yes
 +
|smm=Yes
 +
|fpu=Yes
 +
|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|3dnow=No
 +
|e3dnow=No
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=Yes
 +
|avx=Yes
 +
|avx2=Yes
 +
 +
|abm=Yes
 +
|tbm=No
 +
|bmi1=Yes
 +
|bmi2=Yes
 +
|fma3=Yes
 +
|fma4=No
 +
|aes=Yes
 +
|rdrand=Yes
 +
|sha=No
 +
|xop=No
 +
|adx=Yes
 +
|clmul=Yes
 +
|f16c=Yes
 +
|tbt1=No
 +
|tbt2=Yes
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|sst=Yes
 +
|flex=Yes
 +
|fastmem=No
 +
|isrt=Yes
 +
|sba=Yes
 +
|mwt=Yes
 +
|sipp=No
 +
|att=No
 +
|ipt=Yes
 +
|tsx=No
 +
|txt=No
 +
|ht=Yes
 +
|vpro=No
 +
|vtx=Yes
 +
|vtd=Yes
 +
|ept=Yes
 +
|mpx=Yes
 +
|sgx=Yes
 +
|securekey=Yes
 +
|osguard=Yes
 +
|smartmp=No
 +
|powernow=No
 +
|amdv=No
 +
|rvi=No
 
}}
 
}}

Latest revision as of 13:22, 16 March 2018

Edit Values
Core i5-7267U
General Info
DesignerIntel
ManufacturerIntel
Model Numberi5-7267U
S-SpecSR362
MarketMobile
IntroductionJanuary 3, 2017 (announced)
January 3, 2017 (launched)
Release Price$304.00
ShopAmazon
General Specs
FamilyCore i5
Seriesi5-7200
LockedYes
Frequency3,100 MHz
Turbo Frequency3,500 MHz (1 core)
Bus typeOPI
Bus rate4 GT/s
Clock multiplier31
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureKaby Lake
PlatformKaby Lake
Core NameKaby Lake U
Core Family6
Core Model142
Core SteppingJ1
Process14 nm
TechnologyCMOS
Word Size64 bit
Cores2
Threads4
Max Memory32 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore0.55 V-1.52 V
TDP28 W
cTDP down23 W
Tjunction0 °C – 100 °C
Tstorage-25 °C – 125 °C
Packaging
PackageFCBGA-1356 (BGA)
Dimension42 mm x 24 mm x 1.3 mm
Pitch0.65 mm
Ball Count1356
Ball CompSAC405
InterconnectBGA-1356

Core i5-7267U is a 64-bit dual-core mid-range performance x86 mobile microprocessor introduced by Intel in early 2017. This chip, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's 14nm+ process. The i5-7267U operates at 3.1 GHz with a TDP of 15 W supporting a Turbo Boost frequency of 3.5 GHz. The processor supports up to 32 GiB of dual-channel non-ECC DDR4-2133 memory and incorporates Intel's Iris Plus Graphics 650 IGP operating at 300 MHz with a burst frequency of 1.05 GHz. This specific GPU also incorporates an additional 64 MiB of eDRAM L4$.

This model has a configurable TDP-down of 23 W.

Cache[edit]

Main article: Kaby Lake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB4-way set associativewrite-back
L3$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  2x2 MiB12-way set associativewrite-back
L4$64 MiB
65,536 KiB
67,108,864 B
0.0625 GiB
     

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeLPDDR3-1866, DDR3L-1600, DDR4-2133
Supports ECCNo
Max Mem32 GiB
Controllers1
Channels2
Max Bandwidth31.79 GiB/s
32,552.96 MiB/s
34.134 GB/s
34,134.253 MB/s
0.031 TiB/s
0.0341 TB/s
Bandwidth
Single 15.89 GiB/s
Double 31.79 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes12
Configs1x4, 2x2, 1x2+2x1, 4x1


Graphics[edit]

The Iris Plus Graphics 650 includes 64 MiB of L4 eDRAM cache in addition to everything else.

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUIris Plus Graphics 650
DesignerIntelDevice ID0x5927
Execution Units48Max Displays3
Max Memory32 GiB
32,768 MiB
33,554,432 KiB
34,359,738,368 B
Frequency300 MHz
0.3 GHz
300,000 KHz
Burst Frequency1,050 MHz
1.05 GHz
1,050,000 KHz
OutputDP, eDP, HDMI, DVI
Max Resolution
HDMI4096x2304 @30 Hz
DP4096x2304 @60 Hz
eDP4096x2304 @60 Hz
Standards
DirectX12
OpenGL4.4
OpenCL2.0
DP1.2
eDP1.4
HDMI1.4a
Additional Features
Intel Quick Sync Video
Intel InTru 3D
Intel Clear Video
Intel Clear Video HD

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
SSE4aStreaming SIMD Extensions 4a
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
SSTSpeed Shift Technology
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
Flex MemoryFlex Memory Access
ISRTSmart Response Technology
SBASmall Business Advantage
MWTMy WiFi Technology
IPTIdentity Protection Technology
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i5/i5-7267u&oldid=75264"
Facts about "Core i5-7267U - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core i5-7267U - Intel#io +
has ecc memory supportfalse +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description4-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description12-way set associative +
l3$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
max memory bandwidth31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels2 +
max pcie lanes12 +
supported memory typeLPDDR3-1866 +, DDR3L-1600 + and DDR4-2133 +