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Difference between revisions of "Template:x86 isa main"

 
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<table style="border: solid 1px #a7d7f9;  width:  375px; float: right; margin: 0 10px 10px 10px; text-align: left; font-size: 12px;">
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<div class="guidebox">
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<tr><td style="text-align: center;" colspan="3">[[x86|<span style="text-decoration: none; color: #555555; text-shadow: 0px 2px 3px #222222; font-size: 60pt; font-weight: bold;">x86</span>]]<br><span style="font-size: 20pt;">Instruction Set Architecture</span></td></tr>
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<div style="text-align: center;">[[x86|<span style="color: rgba(0,0,0,.53); text-shadow: 0px 2px 3px rgba(0,0,0,.33); font-size: 20pt; font-weight: bold; ">x86</span>]]<br>'''Instruction Set Architecture'''</div>
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<tr style="text-align: center;"><td style="border-top: 1px solid #a7d7f9;" colspan="3"></td></tr>
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<div class="header">General</div>
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<tr style="text-align: center;"><td>{{x86|History}}</td><td>{{x86|list of processor families|Families}}</td><td></td></tr>
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* {{x86|History}}
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<tr style="text-align: center;"><td style="border-top: 1px solid #a7d7f9;" colspan="3">Variants</td></tr>
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* {{x86|list of processor families|Families}}
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|x86-16}}</td><td>{{x86|x86-32}}</td><td>{{x86|x86-64}}</td></tr>
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<div class="header">Variants</div>
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<tr style="text-align: center;"><td style="border-top: 1px solid #a7d7f9;" colspan="3">Topics</td></tr>
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* {{x86|x86-16}}
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|Instruction Listing|Instructions}}</td><td>{{x86|Addressing Modes}}</td><td>{{x86|Registers}}</td></tr>
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* {{x86|x86-32}}
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|Assembly}}</td><td>{{x86|CPUID}}</td><td>{{x86|Interrupts}}</td></tr>
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* {{x86|x86-64}}
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|Micro-Ops}}</td><td>{{x86|Timer}}</td><td>{{x86|Calling Convention}}</td></tr>
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<div class="header">Topics</div>
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|Microarchitectures}}</td><td></td><td></td></tr>
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* {{x86|Instruction Listing|Instructions}}
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<tr style="text-align: center;"><td style="border-top: 1px solid #a7d7f9;" colspan="3">Modes</td></tr>
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* {{x86|Addressing Modes}}
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|Real Mode|Real}}</td><td>{{x86|Protected Mode|Protected}}</td><td>{{x86|Long Mode|Long}}</td></tr>
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* {{x86|Registers}}
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<tr style="text-align: center;"><td style="border-top: 1px solid #a7d7f9;" colspan="3">{{x86|Extensions}}</td></tr>
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* {{x86|Model-Specific Register}}
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|SMM}}</td><td>{{x86|FPU}}</td><td>{{x86|MMX}}</td></tr>
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* {{x86|Assembly}}
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|3DNow!}}</td><td>{{x86|SSE}}</td><td>{{x86|E3DNow!}}</td></tr>
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* {{x86|Interrupts}}
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|EMMX}}</td><td>{{x86|SSE2}}</td><td>{{x86|SSE3}}</td></tr>
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* {{x86|Micro-Ops}}
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|SSSE3}}</td><td>{{x86|SSE4.1}}</td><td>{{x86|SSE4.2}}</td></tr>
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* {{x86|Timer}}
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|SSE4a}}</td><td>{{x86|ABM}}</td><td>{{x86|SSE5}}</td></tr>
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* {{x86|Calling Convention}}
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|XOP}}</td><td>{{x86|CLMUL}}</td><td>{{x86|AVX}}</td></tr>
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* {{x86|Microarchitectures}}
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|F16C}}</td><td>{{x86|FMA3}}</td><td>{{x86|FMA4}}</td></tr>
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* {{x86|CPUID}}
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|SMX}}</td><td>{{x86|AES}}</td><td>{{x86|TBM}}</td></tr>
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<div class="header">CPUIDs</div>
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|BMI1}}</td><td>{{x86|BMI2}}</td><td>{{x86|TSX}}</td></tr>
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* {{amd|CPUID|AMD's CPUIDs}}
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|AVX2}}</td><td>{{x86|ADX}}</td><td>{{x86|RdRAND}}</td></tr>
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* {{intel|CPUID|Intel's CPUIDs}}
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|PREFETCH}}</td><td>{{x86|AVX-512}}</td><td>{{x86|MPX}}</td></tr>
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<div class="header">Modes</div>
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<tr style="text-align: center; border-top: 1px solid #a7d7f9;"><td>{{x86|SGX}}</td><td>{{x86|SHA}}</td><td></td></tr>
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* {{x86|Real Mode|Real}}
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</table>
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* {{x86|Protected Mode|Protected}}
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* {{x86|Long Mode|Long}}
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<div class="header">Extensions<small style="float: right;">({{x86|Extensions|all}})</small></div>
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<div class="wiki-ul-col3">
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* {{x86|3DNow!}}
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* {{x86|ABM}}
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* {{x86|ADX}}
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* {{x86|AES}}
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* {{x86|AMX}}
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* {{x86|AVX}}
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* {{x86|AVX2}}
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* {{x86|AVX-512}}
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* {{x86|BMI1}}
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* {{x86|BMI2}}
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* {{x86|CLMUL}}
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* {{x86|E3DNow!}}
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* {{x86|EMMX}}
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* {{x86|F16C}}
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* {{x86|FMA3}}
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* {{x86|FMA4}}
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* {{x86|FPU}}
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* {{x86|MKTME}}
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* {{x86|MMX}}
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* {{x86|MPX}}
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* {{x86|persistent memory extensions|PMEM}}
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* {{x86|PREFETCH}}
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* {{x86|RdRAND}}
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* {{x86|SEV}}
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* {{x86|SGX}}
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* {{x86|SHA}}
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* {{x86|SME}}
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* {{x86|SMM}}
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* {{x86|SMX}}
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* {{x86|SSE}}
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* {{x86|SSE2}}
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* {{x86|SSE3}}
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* {{x86|SSE4.1}}
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* {{x86|SSE4.2}}
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* {{x86|SSE4a}}
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* {{x86|SSE5}}
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* {{x86|SSSE3}}
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* {{x86|TBM}}
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* {{x86|TME}}
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* {{x86|TSME}}
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* {{x86|TSX}}
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* {{x86|XOP}}
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</div>{{Navbar|Template:x86 isa main|text=|mini=1|style=float:right;}}
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</div>

Latest revision as of 22:37, 28 June 2020

x86
Instruction Set Architecture
General
Variants
Topics
CPUIDs
Modes
Extensions(all)
v · d · e
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