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{{intel title|Pentium U5400}}
 
{{intel title|Pentium U5400}}
{{mpu
+
{{chip
 
| name                = Intel Pentium U5400
 
| name                = Intel Pentium U5400
 
| no image            = yes
 
| no image            = yes
Line 8: Line 8:
 
| designer            = Intel
 
| designer            = Intel
 
| manufacturer        = Intel
 
| manufacturer        = Intel
| model number        = Pentium U5400
+
| model number        = U5400
 
| part number        = CN80617006042AC
 
| part number        = CN80617006042AC
 
| market              = Mobile
 
| market              = Mobile
Line 31: Line 31:
 
| cpuid              = 0x20655
 
| cpuid              = 0x20655
  
 +
| isa family          = x86
 +
| isa                = x86-64
 
| microarch          = Westmere
 
| microarch          = Westmere
 
| platform            = Calpella
 
| platform            = Calpella
Line 50: Line 52:
 
| max memory          = 8 GiB
 
| max memory          = 8 GiB
  
| electrical          = Yes
+
 
 
| v core              =  
 
| v core              =  
 
| v core tolerance    =  
 
| v core tolerance    =  
Line 69: Line 71:
 
}}
 
}}
 
'''Pentium U5400''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency of 1.20 GHz and a TDP of 18 W. This MPU is manufactured on a [[32 nm process]] based on the {{intel|Westmere|l=arch}} microarchitecture ({{intel|Arrandale|l=core}} core). This processor incorporated the {{intel|HD Graphics (Ironlake)}} [[IGP]] on the same package operating at a base frequency of 166.00 MHz and a burst frequency of 500.00 MHz.
 
'''Pentium U5400''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency of 1.20 GHz and a TDP of 18 W. This MPU is manufactured on a [[32 nm process]] based on the {{intel|Westmere|l=arch}} microarchitecture ({{intel|Arrandale|l=core}} core). This processor incorporated the {{intel|HD Graphics (Ironlake)}} [[IGP]] on the same package operating at a base frequency of 166.00 MHz and a burst frequency of 500.00 MHz.
 +
 +
== Cache ==
 +
{{main|intel/microarchitectures/westmere#Memory_Hierarchy|l1=Westmere § Cache}}
 +
{{cache size
 +
|l1 cache=128 KiB
 +
|l1i cache=64 KiB
 +
|l1i break=2x32 KiB
 +
|l1i desc=4-way set associative
 +
|l1i policy=write-back
 +
|l1d cache=64 KiB
 +
|l1d break=2x32 KiB
 +
|l1d desc=8-way set associative
 +
|l1d policy=write-back
 +
|l2 cache=512 KiB
 +
|l2 break=2x256 KiB
 +
|l2 desc=8-way set associative
 +
|l2 policy=write-back
 +
|l3 cache=3 MiB
 +
|l3 break=2x1.5 MiB
 +
|l3 desc=12-way set associative
 +
|l3 policy=write-back
 +
}}
 +
 +
== Memory controller ==
 +
{{memory controller
 +
|type=DDR3-800
 +
|ecc=No
 +
|max mem=8 GiB
 +
|controllers=1
 +
|channels=2
 +
|max bandwidth=11.92 GiB/s
 +
|bandwidth schan=5.96 GiB/s
 +
|bandwidth dchan=11.92 GiB/s
 +
|pae=36 bit
 +
}}
 +
 +
== Expansions ==
 +
{{expansions
 +
| pcie revision      = 2.0
 +
| pcie lanes        = 16
 +
| pcie config        = 1x16
 +
}}
 +
 +
== Graphics ==
 +
{{integrated graphics
 +
| gpu                = HD Graphics (Ironlake)
 +
| device id          = 0x0046
 +
| designer            = Intel
 +
| execution units    = 12
 +
| max displays        = 2
 +
| max memory          =
 +
| frequency          = 166 MHz
 +
| max frequency      = 500 MHz
 +
 +
| directx ver        = 10.1
 +
| opengl ver          = 2.1
 +
 +
| features            = Yes
 +
| intel quick sync    =
 +
| intel intru 3d      =
 +
| intel insider        =
 +
| intel widi          =
 +
| intel fdi            = Yes
 +
| intel clear video    = Yes
 +
| intel clear video hd =
 +
}}
 +
 +
== Features ==
 +
{{x86 features
 +
|real=Yes
 +
|protected=Yes
 +
|smm=Yes
 +
|fpu=Yes
 +
|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|3dnow=No
 +
|e3dnow=No
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=No
 +
|sse42=No
 +
|sse4a=No
 +
|avx=No
 +
|avx2=No
 +
 +
|abm=No
 +
|tbm=No
 +
|bmi1=No
 +
|bmi2=No
 +
|fma3=No
 +
|fma4=No
 +
|aes=No
 +
|rdrand=No
 +
|sha=No
 +
|xop=No
 +
|adx=No
 +
|clmul=No
 +
|f16c=No
 +
|tbt1=No
 +
|tbt2=No
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|flex=Yes
 +
|fastmem=Yes
 +
|isrt=No
 +
|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=No
 +
|tsx=No
 +
|txt=No
 +
|ht=No
 +
|vpro=No
 +
|vtx=No
 +
|vtd=No
 +
|ept=No
 +
|mpx=No
 +
|sgx=No
 +
|securekey=No
 +
|osguard=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdv=No
 +
|rvi=No
 +
}}

Latest revision as of 15:25, 13 December 2017

Edit Values
Intel Pentium U5400
General Info
DesignerIntel
ManufacturerIntel
Model NumberU5400
Part NumberCN80617006042AC
S-SpecSLBUH
MarketMobile
IntroductionMay 25, 2010 (announced)
May 25, 2010 (launched)
ShopAmazon
General Specs
FamilyPentium
SeriesP6000
LockedYes
Frequency1,199.99 MHz
Bus typeDMI 1.0
Bus rate1 × 2.5 GT/s
Clock multiplier9
CPUID0x20655
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureWestmere
PlatformCalpella
ChipsetIbex Peak
Core NameArrandale
Core Family6
Core Model37
Core SteppingK0
Process32 nm
Transistors382,000,000
TechnologyCMOS
Die81 mm²
Word Size64 bit
Cores2
Threads2
Max Memory8 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP18 W
Tjunction0 °C – 90 °C
Tstorage-25 °C – 125 °C
Packaging
PackageBGA-1288 (BGA)BGA-1288.svg
Dimension34 mm x 28 mm x 2.1 mm
Pitch0.7 mm
Pin Count1288

Pentium U5400 is a 64-bit dual-core x86 mobile microprocessor introduced by Intel in 2010. This processor operates at a frequency of 1.20 GHz and a TDP of 18 W. This MPU is manufactured on a 32 nm process based on the Westmere microarchitecture (Arrandale core). This processor incorporated the HD Graphics (Ironlake) IGP on the same package operating at a base frequency of 166.00 MHz and a burst frequency of 500.00 MHz.

Cache[edit]

Main article: Westmere § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB4-way set associativewrite-back
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back

L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB8-way set associativewrite-back

L3$3 MiB
3,072 KiB
3,145,728 B
0.00293 GiB
  2x1.5 MiB12-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-800
Supports ECCNo
Max Mem8 GiB
Controllers1
Channels2
Max Bandwidth11.92 GiB/s
12,206.08 MiB/s
12.799 GB/s
12,799.003 MB/s
0.0116 TiB/s
0.0128 TB/s
Bandwidth
Single 5.96 GiB/s
Double 11.92 GiB/s
Physical Address (PAE)36 bit

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision2.0
Max Lanes16
Configs1x16


Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUHD Graphics (Ironlake)
DesignerIntelDevice ID0x0046
Execution Units12Max Displays2
Frequency166 MHz
0.166 GHz
166,000 KHz
Burst Frequency500 MHz
0.5 GHz
500,000 KHz

Standards
DirectX10.1
OpenGL2.1

Additional Features
Intel Flexible Display Interface (FDI)
Intel Clear Video

Features[edit]

Facts about "Pentium U5400 - Intel"
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description4-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description12-way set associative +
l3$ size3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) +