From WikiChip
Difference between revisions of "intel/xeon e5/e5-2623 v4"
(+q-spec) |
m (Bot: moving all {{mpu}} to {{chip}}) |
||
(5 intermediate revisions by 2 users not shown) | |||
Line 1: | Line 1: | ||
{{intel title|Xeon E5-2623 v4}} | {{intel title|Xeon E5-2623 v4}} | ||
− | {{ | + | {{chip |
| name = Xeon E5-2623 v4 | | name = Xeon E5-2623 v4 | ||
| no image = Yes | | no image = Yes | ||
Line 10: | Line 10: | ||
| model number = E5-2623 v4 | | model number = E5-2623 v4 | ||
| part number = CM8066002402400 | | part number = CM8066002402400 | ||
− | |||
| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
+ | | part number 4 = | ||
| market = Server | | market = Server | ||
| first announced = June 20, 2016 | | first announced = June 20, 2016 | ||
Line 26: | Line 26: | ||
| turbo frequency = Yes | | turbo frequency = Yes | ||
| turbo frequency1 = 3,200 MHz | | turbo frequency1 = 3,200 MHz | ||
− | | turbo frequency2 = | + | | turbo frequency2 = 3,200 MHz |
+ | | turbo frequency3 = 3,000 MHz | ||
+ | | turbo frequency4 = 2,800 MHz | ||
| bus type = QPI | | bus type = QPI | ||
| bus speed = 4,000 MHz | | bus speed = 4,000 MHz | ||
Line 54: | Line 56: | ||
| max memory = 1,536 GiB | | max memory = 1,536 GiB | ||
− | + | ||
| v core = 1.82 V | | v core = 1.82 V | ||
| v core tolerance = | | v core tolerance = | ||
Line 123: | Line 125: | ||
== Expansions == | == Expansions == | ||
− | {{ | + | {{expansions |
| pcie revision = 3.0 | | pcie revision = 3.0 | ||
| pcie lanes = 40 | | pcie lanes = 40 | ||
Line 132: | Line 134: | ||
== Features == | == Features == | ||
− | {{ | + | {{x86 features |
| em64t = Yes | | em64t = Yes | ||
| nx = Yes | | nx = Yes |
Latest revision as of 15:27, 13 December 2017
Edit Values | |
Xeon E5-2623 v4 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | E5-2623 v4 |
Part Number | CM8066002402400 |
S-Spec | SR2PJ QKFD (QS) |
Market | Server |
Introduction | June 20, 2016 (announced) June 20, 2016 (launched) |
Release Price | $444.00 |
Shop | Amazon |
General Specs | |
Family | Xeon E5 |
Series | E5-2000 |
Locked | Yes |
Frequency | 2,600 MHz |
Turbo Frequency | Yes |
Turbo Frequency | 3,200 MHz (1 core), 3,200 MHz (2 cores), 3,000 MHz (3 cores), 2,800 MHz (4 cores) |
Bus type | QPI |
Bus speed | 4,000 MHz |
Bus rate | 2 × 8 GT/s |
Clock multiplier | 26 |
CPUID | 406F1 |
Microarchitecture | |
Microarchitecture | Broadwell |
Platform | Grantley EP 2S |
Chipset | C610 Series |
Core Name | Broadwell EP |
Core Family | 6 |
Core Model | 4F |
Core Stepping | R0 |
Process | 14 nm |
Transistors | 3,200,000,000 |
Technology | CMOS |
Die | 246.24 mm² |
Word Size | 64 bit |
Cores | 4 |
Threads | 8 |
Max Memory | 1,536 GiB |
Multiprocessing | |
Max SMP | 2-Way (Multiprocessor) |
Electrical | |
Vcore | 1.82 V |
VI/O | 1.2 V ± 3% |
TDP | 85 W |
Tcase | 0 °C – 73 °C |
Tstorage | -25 °C – 125 °C |
The Xeon E5-2623 v4 is a 64-bit quad-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for frequency-optimized 2S environments (1U square form factor). Operating at 2.6 GHz with a turbo boost frequency of 3.2 GHz for a single active core, this MPU has a TDP of 85 W and is manufactured on a 14 nm process (based on Broadwell).
Cache[edit]
- Main article: Broadwell § Cache
Cache Info [Edit Values] | ||
L1I$ | 128 KiB 131,072 B 0.125 MiB |
4x32 KiB 8-way set associative (per core, write-back) |
L1D$ | 128 KiB 131,072 B 0.125 MiB |
4x32 KiB 8-way set associative (per core, write-back) |
L2$ | 1 MiB 1,024 KiB 1,048,576 B 9.765625e-4 GiB |
4x256 KiB 8-way set associative (per core, write-back) |
L3$ | 10 MiB 10,240 KiB 10,485,760 B 0.00977 GiB |
4x2.5 MiB 20-way set associative (shared, per core, write-back) |
Graphics[edit]
This microprocessor has no integrated graphics processing unit.
Memory controller[edit]
Integrated Memory Controller | |
Type | DDR4-2133 |
Controllers | 1 |
Channels | 4 |
ECC Support | Yes |
Max bandwidth | 63.58 GiB/s |
Bandwidth (single) | 15.89 GiB/s |
Bandwidth (dual) | 31.79 GiB/s |
Max memory | 1,536 GiB |
Physical Address Extensions | 46 bit |
Expansions[edit]
Expansion Options
|
||||||||
|
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
|
||||||||||||||||||||||||||||||||||||||||
|
Facts about "Xeon E5-2623 v4 - Intel"
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
l3$ description | 20-way set associative + |
l3$ size | 10 MiB (10,240 KiB, 10,485,760 B, 0.00977 GiB) + |