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{{intel title|Xeon E5-4655 v4}}
 
{{intel title|Xeon E5-4655 v4}}
−
{{mpu
+
{{chip
−
| name               = Xeon E5-4655 v4
+
|name=Xeon E5-4655 v4
−
| no image           = Yes
+
|no image=Yes
−
| image              =
+
|designer=Intel
−
| image size          =
+
|manufacturer=Intel
−
| caption            =
+
|model number=E5-4655 v4
−
| designer           = Intel
+
|part number=CM8066002065000
−
| manufacturer       = Intel
+
|s-spec=SR2SH
−
| model number       = E5-4655 v4
+
|s-spec qs=QKSX
−
| part number         = CM8066002065000
+
|market=Server
−
| part number 1      =  
+
|first announced=June 20, 2016
−
| part number 2      =
+
|first launched=June 20, 2016
−
| part number 3      =  
+
|release price=$4616
−
| market             = Server
+
|family=Xeon E5
−
| first announced     = June 20, 2016
+
|series=E5-4000
−
| first launched     = June 20, 2016
+
|locked=Yes
−
| last order          =  
+
|frequency=2,500 MHz
−
| last shipment      =  
+
|turbo frequency1=3,200 MHz
−
| release price      = $4616
+
|turbo frequency2=3,200 MHz
 +
|turbo frequency3=3,000 MHz
 +
|turbo frequency4=2,900 MHz
 +
|turbo frequency5=2,800 MHz
 +
|turbo frequency6=2,700 MHz
 +
|turbo frequency7=2,600 MHz
 +
|turbo frequency8=2,600 MHz
 +
|turbo frequency=Yes
 +
|bus type=QPI
 +
|bus speed=4,800 MHz
 +
|bus links=2
 +
|bus rate=9.6 GT/s
 +
|clock multiplier=25
 +
|cpuid=406F1
 +
|isa=x86-64
 +
|isa family=x86
 +
|microarch=Broadwell
 +
|platform=Grantley EP 4S
 +
|chipset=C610 Series
 +
|core name=Broadwell EP
 +
|core family=6
 +
|core model=4F
 +
|core stepping=M0
 +
|process=14 nm
 +
|transistors=3,200,000,000
 +
|technology=CMOS
 +
|word size=64 bit
 +
|core count=8
 +
|thread count=16
 +
|max memory=1,536 GiB
 +
|max cpus=4
 +
|v core=1.82 V
 +
|v io=1.2 V
 +
|v io tolerance=3%
 +
|tdp=135 W
 +
|tcase min=0 °C
 +
|tcase max=82 °C
 +
|tstorage min=-25 °C
 +
|tstorage max=125 °C
 +
|die size=246.24 mm²
 +
|packaging=Yes
 +
|package 0=FCLGA-2011-v3
 +
|package 0 type=FCLGA
 +
|package 0 pins=2011
 +
|package 0 pitch=0.8814 mm
 +
|package 0 width=52.5 mm
 +
|package 0 length=45.0 mm
 +
|package 0 height=5.316 mm
 +
|socket 0=LGA-2011-v3
 +
|socket 0 type=LGA
 +
}}
 +
The '''Xeon E5-4655 v4''' is a {{arch|64}} [[octa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for frequency-optimized 4S environments. Operating at 2.5 GHz with a {{intel|turbo boost}} frequency of 3.2 GHz for a single active core, this MPU has a TDP of 135 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}).
  
−
| family              = Xeon E5
+
== Cache ==
−
| series              = E5-4000
+
{{main|intel/microarchitectures/broadwell#Memory_Hierarchy|l1=Broadwell § Cache}}
−
| locked              = Yes
+
{{cache info
−
| frequency          = 2,500 MHz
+
|l1i cache=256 KiB
−
| turbo frequency    = Yes
+
|l1i break=8x32 KiB
−
| turbo frequency1    = 3,200 MHz
+
|l1i desc=8-way set associative
−
| turbo frequency2    =  
+
|l1i extra=(per core, write-back)
−
| bus type            = QPI
+
|l1d cache=256 KiB
−
| bus speed          = 4,800 MHz
+
|l1d break=8x32 KiB
−
| bus rate            = 9.6 GT/s
+
|l1d desc=8-way set associative
−
| bus links          = 2
+
|l1d extra=(per core, write-back)
−
| clock multiplier    = 25
+
|l2 cache=2 MiB
−
| s-spec              = SR2SH
+
|l2 break=8x256 KiB
−
| s-spec es          =  
+
|l2 desc=8-way set associative
−
| s-spec qs          =
+
|l2 extra=(per core, write-back)
−
| cpuid              = 406F1
+
|l3 cache=30 MiB
 +
|l3 break=8x3.75 MiB
 +
|l3 desc=20-way set associative
 +
|l3 extra=(shared, per core, write-back)
 +
}}
  
−
| microarch          = Broadwell
+
== Graphics ==
−
| platform            = Grantley EP 4S
+
This microprocessor has no [[integrated graphics processing unit]].
−
| chipset            = C610 Series
 
−
| core name          = Broadwell EP
 
−
| core family        = 6
 
−
| core model          = 15
 
−
| core stepping      = M0
 
−
| process            = 14 nm
 
−
| transistors        = 3,200,000,000
 
−
| technology          = CMOS
 
−
| die size            = 246.24 mm²
 
−
| word size          = 64 bit
 
−
| core count          = 8
 
−
| thread count        = 16
 
−
| max cpus            = 4
 
−
| max memory          = 1,536 GiB
 
  
−
| electrical          = Yes
+
== Memory controller ==
−
| v core              = 1.82 V
+
{{integrated memory controller
−
| v core tolerance    =  
+
| type              = DDR4-2133
−
| v io                = 1.2 V
+
| controllers        = 1
−
| v io tolerance      = 3%
+
| channels           = 4
−
| sdp                =  
+
| ecc support        = Yes
−
| tdp                = 135 W
+
| max bandwidth      = 63.58 GiB/s
−
| ctdp down           =  
+
| bandwidth schan    = 15.89 GiB/s
−
| ctdp down frequency =  
+
| bandwidth dchan    = 31.79 GiB/s
−
| ctdp up            =  
+
| max memory        = 1,536 GiB
−
| ctdp up frequency  =  
+
| pae                = 46 bit
−
| tjunc min          =  
+
}}
−
| tjunc max           =  
 
−
| tcase min          = 0 °C
 
−
| tcase max          = 82 °C
 
−
| tstorage min        = -25 °C
 
−
| tstorage max        = 125 °C
 
  
−
| packaging          = Yes
+
== Expansions ==
−
| package 0          = FCLGA-2011-v3
+
{{expansions
−
| package 0 type     = FCLGA
+
| pcie revision      = 3.0
−
| package 0 pins     = 2011
+
| pcie lanes        = 40
−
| package 0 pitch    = 0.8814 mm
+
| pcie config        = x4
−
| package 0 width    = 52.5 mm
+
| pcie config 1      = x8
−
| package 0 length    = 45.0 mm
+
| pcie config 2      = x16
−
| package 0 height   = 5.316 mm
+
}}
−
| socket 0            = LGA-2011-v3
+
 
−
| socket 0 type      = LGA
+
== Features ==
 +
{{x86 features
 +
| em64t      = Yes
 +
| nx          = Yes
 +
| txt        = Yes
 +
| tsx        = Yes
 +
| vpro        =
 +
| ht          = Yes
 +
| tbt1        =
 +
| tbt2        = Yes
 +
| tbmt3      =
 +
| bpt        =  
 +
| vt-x        = Yes
 +
| vt-d        = Yes
 +
| ept        = Yes
 +
| mmx        = Yes
 +
| sse        = Yes
 +
| sse2        = Yes
 +
| sse3        = Yes
 +
| ssse3      = Yes
 +
| sse4.1      = Yes
 +
| sse4.2     = Yes
 +
| aes        = Yes
 +
| pclmul     = Yes
 +
| avx        = Yes
 +
| avx2        = Yes
 +
| bmi        = Yes
 +
| bmi1        = Yes
 +
| bmi2        = Yes
 +
| f16c        = Yes
 +
| fma3        = Yes
 +
| mpx        =
 +
| sgx        =  
 +
| eist        = Yes
 +
| secure key  = Yes
 +
| os guard   = Yes
 +
| intel at    =  
 +
| intel ipt  =  
 
}}
 
}}
−
The '''Xeon E5-4655 v4''' is a {{arch|64}} [[octa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for frequency-optimized 4S environments. Operating at 2.5 GHz with a {{intel|turbo boost}} frequency of 3.2 GHz for a single active core, this MPU has a TDP of 135 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}).
 

Latest revision as of 17:26, 31 January 2024

Edit Values
Xeon E5-4655 v4
General Info
DesignerIntel
ManufacturerIntel
Model NumberE5-4655 v4
Part NumberCM8066002065000
S-SpecSR2SH
QKSX (QS)
MarketServer
IntroductionJune 20, 2016 (announced)
June 20, 2016 (launched)
Release Price$4616
ShopAmazon
General Specs
FamilyXeon E5
SeriesE5-4000
LockedYes
Frequency2,500 MHz
Turbo FrequencyYes
Turbo Frequency3,200 MHz (1 core),
3,200 MHz (2 cores),
3,000 MHz (3 cores),
2,900 MHz (4 cores),
2,800 MHz (5 cores),
2,700 MHz (6 cores),
2,600 MHz (7 cores),
2,600 MHz (8 cores)
Bus typeQPI
Bus speed4,800 MHz
Bus rate2 × 9.6 GT/s
Clock multiplier25
CPUID406F1
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureBroadwell
PlatformGrantley EP 4S
ChipsetC610 Series
Core NameBroadwell EP
Core Family6
Core Model4F
Core SteppingM0
Process14 nm
Transistors3,200,000,000
TechnologyCMOS
Die246.24 mm²
Word Size64 bit
Cores8
Threads16
Max Memory1,536 GiB
Multiprocessing
Max SMP4-Way (Multiprocessor)
Electrical
Vcore1.82 V
VI/O1.2 V ± 3%
TDP135 W
Tcase0 °C – 82 °C
Tstorage-25 °C – 125 °C

The Xeon E5-4655 v4 is a 64-bit octa-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for frequency-optimized 4S environments. Operating at 2.5 GHz with a turbo boost frequency of 3.2 GHz for a single active core, this MPU has a TDP of 135 W and is manufactured on a 14 nm process (based on Broadwell).

Cache[edit]

Main article: Broadwell § Cache
Cache Info [Edit Values]
L1I$ 256 KiB
262,144 B
0.25 MiB
8x32 KiB 8-way set associative (per core, write-back)
L1D$ 256 KiB
262,144 B
0.25 MiB
8x32 KiB 8-way set associative (per core, write-back)
L2$ 2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
8x256 KiB 8-way set associative (per core, write-back)
L3$ 30 MiB
30,720 KiB
31,457,280 B
0.0293 GiB
8x3.75 MiB 20-way set associative (shared, per core, write-back)

Graphics[edit]

This microprocessor has no integrated graphics processing unit.

Memory controller[edit]

Integrated Memory Controller
Type DDR4-2133
Controllers 1
Channels 4
ECC Support Yes
Max bandwidth 63.58 GiB/s
Bandwidth (single) 15.89 GiB/s
Bandwidth (dual) 31.79 GiB/s
Max memory 1,536 GiB
Physical Address Extensions 46 bit

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes40
Configsx4, x16


Features[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_e5/e5-4655_v4&oldid=102183"
Facts about "Xeon E5-4655 v4 - Intel"
RDF feed
l1d$ description8-way set associative +
l1d$ size256 KiB (262,144 B, 0.25 MiB) +
l1i$ description8-way set associative +
l1i$ size256 KiB (262,144 B, 0.25 MiB) +
l2$ description8-way set associative +
l2$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l3$ description20-way set associative +
l3$ size40 MiB (40,960 KiB, 41,943,040 B, 0.0391 GiB) +